Configurable ultrasonic imager

ABSTRACT

An imaging device includes a two dimensional array of piezoelectric elements. Each piezoelectric element includes: a piezoelectric layer; a bottom electrode disposed on a bottom side of the piezoelectric layer and configured to receive a transmit signal during a transmit mode and develop an electrical charge during a receive mode; and a first top electrode disposed on a top side of the piezoelectric layer; and a first conductor, wherein the first top electrodes of a portion of the piezoelectric elements in a first column of the two dimensional array are electrically coupled to the first conductor.

CROSS REFERENCE TO RELATED APPLICATIONS

This application is a Divisional of U.S. patent application Ser. No.17/067,139, filed on Oct. 9, 2020, which is a Divisional of U.S. patentapplication Ser. No. 15/826,606 filed on Nov. 29, 2017, issued as U.S.Pat. No. 10,835,209, which claims the benefit of U.S. ProvisionalApplication Nos. 62,429,832, filed on Dec. 4, 2016, entitled “AConfigurable Ultrasonic Line imager,” 62,429,833, filed on Dec. 4, 2016,entitled “Low Voltage, Low Power MEMS Transducer with DirectInterconnect,” and 62,433,782, filed on Dec. 13, 2016, entitled“Micromachined Transceiver Array,” which are hereby incorporated byreference in their entirety.

BACKGROUND Technical Field

The present invention relates to imaging devices, and more particularly,to imaging devices having configurable ultrasonic line imagers.

Background of the Invention

A non-intrusive imaging system/probe for imaging internal tissue, bones,blood flow or organs of human or animal body and displaying the imagesrequires transmission of a signal into the body and receiving an emittedor reflected signal from the body part being imaged. Typically,transducers that are used in an imaging system are referred to astransceivers and some of the transceivers are based on photo-acoustic orultrasonic effects. In general, the transceivers are used for imaging,but are not necessarily limited to imaging. For example, thetransceivers can be used in medical imaging, flow measurements in pipes,speaker and microphone arrays, lithotripsy, localized tissue heating fortherapeutics or highly intensive focused ultrasound (HIFU) for surgery.The conventional transducers built from bulk piezoelectric (PZT)material typically require very high voltage pulses to generatetransmission signals, typically 100 V or more. This high voltage resultsin high power dissipation, since the power consumption/dissipation inthe transducers is proportional to the square of the drive voltage.There is also a limit on how hot the surface of the probe could be andthis limits how much power could be consumed in the probe, since theconsumed power is proportional to the heat generated by the probe. Inthe conventional systems, the heat generation has necessitated coolingarrangements for some probes, increasing the manufacturing costs andweights of the probes. In general, the weight of the conventional probeis also an issue, since a large number of sonographers, who use theseprobes, are known to suffer from muscular injuries.

The conventional ultrasound probes in use for medical imaging typicallyuse PZT material or other piezo ceramic and polymer composites. Probestypically house the transducers and some other electronics with means tocause an image to be displayed on a display unit. To fabricate theconventional bulk PZT elements for the transducers, one can simply cut athick piezoelectric material slab into large rectangular shaped PZTelements. These rectangular shaped PZT elements are very expensive tobuild, since the manufacturing process involves precisely cutting of therectangular shaped thick PZT or ceramic material and mounting onsubstrates with precise spacing. Further, the impedance of thetransducers is much higher than the impedance of the transmit/receiveelectronics for the transducers.

In the conventional systems, the transmit/receive electronics for thetransducers often are located far away from the probe, requiringmicro-coax cables between the transducers and electronics. In general,the cables need to have a precise length for delay and impedancematching, and, quite often, additional impedance matching networks arerequired for efficient connection of the transducers through the cablesto the electronics.

Advances in micro-machining technologies allow sensors and actuators,such as capacitive micromachined ultrasound transducers (cMUTs) andpiezoelectric micromachined ultrasound transducers (pMUTs), to beefficiently formed on a substrate. Compared to the conventionaltransducers having bulky piezoelectric material, pMUTs are less bulkyand cheaper to manufacture while they have simpler and higherperformance interconnection between electronics and transducers, providegreater flexibility in the operational frequency, and potential togenerate higher quality images.

Although the basic concepts for these transducers have been disclosed inthe early 1990's, commercial implementation of these concepts has metwith a number of challenges. For instance, the conventional cMUT sensorsare particularly prone to failure or drift in performance due to thecharge build-up during the high voltage operation, difficulty withgenerating high enough acoustic pressure at lower frequencies and areinherently nonlinear. The conventional pMUTs have been a promisingalternative but have issues related to transmission and receiveinefficiencies, still required relatively high operating voltages andhad limited bandwidth As such, there is a need for pMUTs that have anenhanced efficiency, that can operate at lower voltages and exhibit highbandwidth.

SUMMARY OF THE DISCLOSURE

In embodiments, an imaging device includes a two dimensional array ofpiezoelectric elements. Each piezoelectric element includes: apiezoelectric layer; a bottom electrode disposed on a bottom side of thepiezoelectric layer and configured to receive a transmit signal during atransmit mode and develop an electrical charge during a receive mode;and a first top electrode disposed on a top side of the piezoelectriclayer; and a first conductor, where the first top electrodes of aportion of the piezoelectric elements in a first column of the twodimensional array are electrically coupled to the first conductor.

In embodiments, an imaging device includes: a two dimensional array ofpiezoelectric elements, each piezoelectric element of the twodimensional array of piezoelectric elements including at least one subpiezoelectric element and including: a piezoelectric layer; a bottomelectrode disposed on a bottom side of the piezoelectric layer; andfirst and second top electrodes disposed on a top side of thepiezoelectric layer; and a first conductor, the first top electrodes ofa portion of piezoelectric elements in a first column of the twodimensional array being electrically coupled to the first conductor; afirst electrical circuit electrically coupled to the first conductor andconfigured to process a signal received through the first conductor; asecond conductor, the second top electrodes of a portion ofpiezoelectric elements in a second column of the two dimensional arraybeing electrically coupled to the second conductor; a switch havingfirst and second ends, the first end being electrically coupled to thesecond conductor; a second electrical circuit for processing a signal; atransmit driver for sending a signal to the second conductor; and thesecond end of the switch selectively coupled to one of the secondelectrical circuit and the transmit driver.

In embodiments, an imaging device includes: a two dimensional array ofpiezoelectric elements, each piezoelectric element of the twodimensional array of piezoelectric elements including at least one subpiezoelectric element and comprising: a piezoelectric layer; a bottomelectrode disposed on a bottom side of the piezoelectric layer; andfirst and second top electrodes disposed on a top side of thepiezoelectric layer; and a first conductor, the first top electrodes ofa portion of piezoelectric elements in a first row of the twodimensional array being electrically coupled to the first conductor; afirst electrical circuit electrically coupled to the first conductor andconfigured to process a signal received through the first conductor; asecond conductor, the second top electrodes of a portion ofpiezoelectric elements in a first column of the two dimensional arraybeing electrically coupled to the second conductor; a switch havingfirst and second ends, the first end being electrically coupled to thesecond conductor; a second electrical circuit for processing a signal; atransmit driver for sending a signal to the second conductor; and thesecond end of the switch selectively coupled to one of the secondelectrical circuit and the transmit driver

In embodiments, an imaging device includes a transceiver substrate andan application-specific integrated circuit (ASIC) chip. The transceiversubstrate includes: a two dimensional array of piezoelectric elements,each piezoelectric element of the two dimensional array of piezoelectricelements comprising: a piezoelectric layer; a bottom electrode disposedon a bottom side of the piezoelectric layer; first and second topelectrodes disposed on a top side of the piezoelectric layer; and firstand second conductors electrically coupled to the first and second topelectrodes, respectively. The ASIC chip includes: a two dimensionalarray of circuit elements, each circuit element of the two dimensionalarray of circuit elements comprising: a first electrical circuitelectrically coupled to the first conductor of a piezoelectric elementand configured to process a signal received through the first conductor;a switch having first and second ends, the first end being electricallycoupled to the second conductor of a piezoelectric element; a secondelectrical circuit for processing a signal; a transmit driver forsending a signal to the second conductor; and the second end of theswitch selectively coupled to one of the second electrical circuit andthe transmit driver.

In embodiments, an electrical circuit for controlling a plurality ofpiezoelectric elements includes: a first conductor for transmitting adriving signal to one or more of the plurality of piezoelectric elementstherethrough during a transmit mode; and a second conductor fortransmitting a sensor signal from one or more of the plurality ofpiezoelectric elements therethrough during a receive mode. Each circuitelement of the plurality of circuit elements includes: a first switchhaving a first end electrically coupled to the second conductor and afirst electrode of a piezoelectric element; a second switch having firstand second ends, the first end of the second switch being electricallycoupled to the first conductor; a transmit driver electrically coupledto the second end of the second switch and configured to transmit asignal to a first electrode of a piezoelectric element upon receiving asignal through the second end of the second switch; and a third switchhaving first and second ends, the first end of the third switch beingelectrically coupled to the second end of the second switch, the secondend of the third switch being electrically coupled to an electrode of apiezoelectric element.

In embodiments, a method for poling a piezoelectric element that iselectrically coupled to an application-specific integrated circuit(ASIC) chip and includes a bottom electrode, a piezoelectric layerdisposed on the bottom electrode, first and second top electrodesdisposed on the piezoelectric layer, includes the steps of: electricallyconnecting the bottom electrode to a ground; applying a positive voltageto the first top electrode; applying a negative voltage to the secondtop electrode; and subjecting the piezoelectric element to a temperaturefor an extended period of time so that a first portion of thepiezoelectric layer under the first top electrode is poled in a firstdirection and a second portion of the piezoelectric layer under thesecond top electrode is poled in a second direction that is opposite tothe first direction.

In embodiments, an imaging device includes: a two dimensional array ofpiezoelectric elements, each piezoelectric element including at leastone sub piezoelectric element and comprising: a piezoelectric layer; abottom electrode disposed on a bottom side of the piezoelectric layer;and a first top electrode disposed on atop side of the piezoelectriclayer; and an application-specific integrated circuit (ASIC) chipcomprising an array of circuits for driving the two dimensional array ofpiezoelectric elements, each of the circuits being electrically coupledto a corresponding piezoelectric element, wherein a first line imagerincluding a portion of piezoelectric elements in a first column of thetwo dimensional array is formed by simultaneously turning on a portionof the circuits that control the portion of the piezoelectric elementsin the first column of the two dimensional array.

BRIEF DESCRIPTION OF THE DRAWINGS

References will be made to embodiments of the invention, examples ofwhich may be illustrated in the accompanying figures. These figures areintended to be illustrative, not limiting. Although the invention isgenerally described in the context of these embodiments, it should beunderstood that it is not intended to limit the scope of the inventionto these particular embodiments.

Figure (or “FIG.”) 1 shows a schematic diagram of an imaging systemaccording to embodiments of the present disclosure.

FIG. 2 shows a schematic diagram of an ultrasonic imager according toembodiments of the present disclosure.

FIG. 3A shows a side views of an exemplary transceiver array accordingto embodiments of the present disclosure.

FIG. 3B shows a top view of a transceiver tile according to embodimentsof the present disclosure.

FIG. 4-8 show steps for fabricating an exemplary piezoelectric elementaccording to embodiments of the present disclosure.

FIG. 9 shows a schematic diagram of a piezoelectric element according toembodiments of the present disclosure.

FIG. 10A shows a schematic diagram of a piezoelectric element accordingto embodiments of the present disclosure.

FIG. 10B shows a symbolic representation of the piezoelectric element inFIG. 10A.

FIG. 10C shows a schematic cross sectional view of an exemplarypiezoelectric element according to embodiments of the presentdisclosure.

FIG. 10D shows a schematic diagram of a piezoelectric element accordingto embodiments of the present disclosure.

FIG. 10E shows a schematic diagram of a piezoelectric element accordingto embodiments of the present disclosure.

FIG. 10F shows a schematic diagram of a piezoelectric element accordingto embodiments of the present disclosure.

FIG. 10G shows a bottom view of the piezoelectric element in FIG. 10Faccording to embodiments of the present disclosure.

FIG. 10H shows a cross sectional view of the piezoelectric element inFIG. 10F according to embodiments of the present disclosure.

FIG. 11 shows a schematic diagram of a piezoelectric element accordingto embodiments of the present disclosure.

FIG. 12-16 shows steps for fabricating an exemplary piezoelectricelement according to embodiments of the present disclosure.

FIG. 17A shows dipole orientations of a piezoelectric material before,during and after a poling process according to embodiments of thepresent disclosure.

FIG. 17B shows a flow chart of an illustrative process for poling apiezoelectric layer according to embodiments of the present disclosure.

FIG. 18A shows a schematic diagram of an imaging assembly according toembodiments of the present disclosure.

FIG. 18B shows a schematic diagram of an imaging assembly according toembodiments of the present disclosure.

FIG. 19A-1 shows atop view of a transceiver substrate and an ASIC chipaccording to embodiments of the present disclosure.

FIG. 19A-2 shows a side view of an imaging assembly according toembodiments of the present disclosure.

FIG. 19B-1 shows atop view of a transceiver substrate and an ASIC chipaccording to embodiments of the present disclosure.

FIG. 19B-2 shows a side view of an imaging assembly according toembodiments of the present disclosure.

FIG. 19C shows a top view of a transceiver substrate and an ASIC chipaccording to embodiments of the present disclosure.

FIG. 19D shows a top view of a transceiver substrate and an ASIC chipaccording to embodiments of the present disclosure.

FIG. 19E shows a top view of a transceiver substrate and an ASIC chipaccording to embodiments of the present disclosure.

FIG. 19F shows a top view of a transceiver substrate and an ASIC chipaccording to embodiments of the present disclosure.

FIG. 19G shows a top view of a transceiver substrate and an ASIC chipaccording to embodiments of the present disclosure.

FIG. 20 illustrates a schematic diagram of an array of piezoelectricelements capable of performing two and three dimensional imagingaccording to embodiments of the present disclosure.

FIG. 21 illustrates a schematic diagram of an array of piezoelectricelements according to embodiments of the present disclosure.

FIG. 22 illustrates a schematic diagram of an array of piezoelectricelements according to embodiments of the present disclosure.

FIG. 23 illustrates a schematic diagram of an array of piezoelectricelements according to embodiments of the present disclosure.

FIG. 24 illustrates a schematic diagram of an array of piezoelectricelements according to embodiments of the present disclosure.

FIG. 25 illustrates a schematic diagram of an array of piezoelectricelements according to embodiments of the present disclosure.

FIG. 26 illustrates a schematic diagram of an array of piezoelectricelements according to embodiments of the present disclosure.

FIG. 27 illustrates a schematic diagram of an array of piezoelectricelements according to embodiments of the present disclosure.

FIG. 28 illustrates a schematic diagram of an imaging system accordingto embodiments of the present disclosure.

FIG. 29 illustrates a schematic diagram of an imaging system accordingto embodiments of the present disclosure.

FIG. 30 shows an embodiment of a piezoelectric element coupled to acircuit element according to embodiments of the present disclosure.

FIG. 31 shows a circuit for controlling multiple piezoelectric elementaccording to embodiments of the present disclosure.

FIG. 32 shows a circuit for controlling multiple piezoelectric elementaccording to embodiments of the present disclosure.

FIG. 33 shows a transmit drive signal waveform according to embodimentsof the present disclosure.

FIG. 34 shows a transmit drive signal waveform according to embodimentsof the present disclosure.

FIG. 35 shows a transmit drive signal waveform according to embodimentsof the present disclosure.

FIG. 36 shows input/output signals of various circuits in an imagingassembly according to embodiments of the present disclosure.

FIG. 37A shows a plot of the amplitude of a transmit pressure wave as afunction of angle according to embodiments of the present disclosure.

FIG. 37B shows windows for apodization process according to embodimentsof the present disclosure.

FIG. 38 shows a schematic diagram of an imaging assembly according toembodiments of the present disclosure.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

In the following description, for purposes of explanation, specificdetails are set forth in order to provide an understanding of thedisclosure. It will be apparent, however, to one skilled in the art thatthe disclosure can be practiced without these details. Furthermore, oneskilled in the art will recognize that embodiments of the presentdisclosure, described below, may be implemented in a variety of ways,such as a process, an apparatus, a system, a device, or a method on atangible computer-readable medium.

One skilled in the art shall recognize: (1) that certain fabricationsteps may optionally be performed; (2) that steps may not be limited tothe specific order set forth herein; and (3) that certain steps may beperformed in different orders, including being done contemporaneously.

Elements/components shown in diagrams are illustrative of exemplaryembodiments of the disclosure and are meant to avoid obscuring thedisclosure. Reference in the specification to “one embodiment,”“preferred embodiment,” “an embodiment,” or “embodiments” means that aparticular feature, structure, characteristic, or function described inconnection with the embodiment is included in at least one embodiment ofthe disclosure and may be in more than one embodiment. The appearancesof the phrases “in one embodiment,” “in an embodiment,” or “inembodiments” in various places in the specification are not necessarilyall referring to the same embodiment or embodiments. The terms“include,” “including,” “comprise,” and “comprising” shall be understoodto be open terms and any lists that follow are examples and not meant tobe limited to the listed items. Any headings used herein are fororganizational purposes only and shall not be used to limit the scope ofthe description or the claims. Furthermore, the use of certain terms invarious places in the specification is for illustration and should notbe construed as limiting.

In embodiments, the pMUT transducers and transducer assemblies may beused for generating images of internal organs of a human/animal body aswell as other therapeutic applications where ultrasonic beams are usedto heat tissue for healing or focus high power ultrasonic beams formicro surgery. In embodiments, the piezoelectric elements may also beused for tomography applications.

In embodiments, the manufacturing cost of pMUTs may be reduced byapplying modern semiconductor and wafer processing techniques. Inembodiments, thin film piezoelectric layer may be spun on or sputteredonto semiconductor wafers and later patterned to create piezoelectricsensors that each have two or more electrodes. In embodiment, eachpiezoelectric element may be designed to have the ability to emit orreceive signals at a certain frequency, known as center frequency, aswell as the second and/or additional frequencies. Hereinafter, the termspiezoelectric element, pMUT, transceiver, and pixel are usedinterchangeably.

FIG. 1 shows a schematic diagram of an imaging system 100 according toembodiments of the present disclosure. As depicted, the system 100 mayinclude: an imager 120 that generates and transmits pressure waves 122toward an internal organ 112, such as heart, in a transmit mode/process;and a device 102 that sends and receives signals to the imager through acommunication channel 130. In embodiments, the internal organ 112 mayreflect a portion of the pressure waves 122 toward the imager 120, andthe imager 120 may capture the reflected pressure waves and generateelectrical signals in a receive mode/process. The imager 120 maycommunicate electrical signals to the device 102 and the device 102 maydisplay images of the organ or target on a display/screen 104 using theelectrical signals.

In embodiment, the imager 120 may be used to perform one dimensionalimaging, also known as A-Scan, two dimensional imaging, also known as Bscan, three dimensional imaging, also sometimes referred to as C scan,and Doppler imaging. Also, the imager may be switched to various imagingmodes under program control.

In embodiments, the imager 120 may be used to get an image of internalorgans of an animal, too. The imager 120 may also be used to determinedirection and velocity of blood flow in arteries and veins as in Dopplermode imaging and also measure tissue stiffness. In embodiments, thepressure wave 122 may be acoustic, ultrasonic, or photo-acoustic wavesthat can travel through the human/animal body and be reflected by theinternal organs, tissue or arteries and veins.

In embodiments, the imager 120 may be a portable device and communicatesignals through the communication channel 130, either wirelessly (usinga protocol, such as 802.11 protocol) or via a cable (such as USB2, USB3, USB 3.1, and USB-C), with the device 102. In embodiments, the device102 may be a mobile device, such as cell phone or iPad, or a stationarycomputing device that can display images to a user.

In embodiments, an imager may be configured to simultaneously transmitand receive ultrasonic waveforms. Certain piezoelectric elements may beconfigured to send pressure waves toward the target organ being imagedwhile other piezoelectric elements may receive the pressure wavesreflected from the target organ and develop electrical charges inresponse to the received waves.

FIG. 2 shows a schematic diagram of the imager 120 according toembodiments of the present disclosure. In embodiments, the imager 120may be an ultrasonic imager. As depicted in FIG. 2 , the imager 120 mayinclude: a transceiver tile(s) 210 for transmitting and receivingpressure waves; a coating layer 212 that operates as a lens for steeringthe propagation direction of and/or focusing the pressure waves and alsofunctions as an impedance interface between the transceiver tile and thehuman body 110; a control unit 202, such as ASIC chip (or, shortlyASIC), for controlling the transceiver tile(s) 210 and coupled to thetransducer tile 210 by bumps; Field Programmable Gate Arrays (FPGAs) 214for controlling the components of the imager 120; a circuit(s) 215, suchas Analogue Front End (AFE), for processing/conditioning signals; anacoustic absorber layer 203 for absorbing waves that are generated bythe transducer tiles 210 and propagate toward the circuit 215; acommunication unit 208 for communicating data with an external device,such as the device 102, through one or more ports 216; a memory 218 forstoring data; a battery 206 for providing electrical power to thecomponents of the imager; and optionally a display 217 for displayingimages of the target organs.

In embodiments, the device 102 may have a display/screen. In such acase, the display may not be included in the imager 120. In embodiments,the imager 120 may receive electrical power from the device 102 throughone of the ports 230. In such a case, the imager 120 may not include thebattery 206. It is noted that one or more of the components of theimager 120 may be combined into one integral electrical element.Likewise, each component of the imager 120 may be implemented in one ormore electrical elements.

In embodiments, the user may apply gel on the skin of the human body 110before the body 110 makes a direct contact with the coating layer 212 sothat the impedance matching at the interface between the coating layer212 and the human body 110 may be improved, i.e., the loss of thepressure wave 122 at the interface is reduced and the loss of thereflected wave travelling toward the imager 120 is also reduced at theinterface. In embodiments, the transceiver tiles 210 may be mounted on asubstrate and may be attached to an acoustic absorber layer. This layerabsorbs any ultrasonic signals that are emitted in the reversedirection, which may otherwise be reflected and interfere with thequality of the image.

As discussed below, the coating layer 212 may be only a flat matchinglayer just to maximize transmission of acoustic signals from thetransducer to the body and vice versa. In embodiments, the thickness ofthe coating layer 212 may be a quarter wavelength of the pressure wavegenerated by the transducer tile(s) 202. Beam focus in the elevationdirection. which is along the direction of the length of the column, isnot essential in this case, because it can be electronically implementedin control unit 202. Even then, the lens may be designed with a focus insome cases. The imager 120 may use the reflected signal to create animage of the organ 112 and results may be displayed on a screen in avariety of format, such as graphs, plots, and statistics shown with orwithout the images of the organ 112.

In embodiments, the control unit 202, such as ASIC, may be assembled asone unit together with the transceiver tiles. In other embodiments, thecontrol unit 202 may be located outside the imager 120 and electricallycoupled to the transceiver tile 210 via a cable. In embodiments, theimager 120 may include a housing that encloses the components 202-215and a heat dissipation mechanism for dissipating heat energy generatedby the components.

FIG. 3A shows a schematic diagram of an exemplary transceiver arrayhaving three transceiver tiles 210 according to embodiments of thepresent disclosure. The tiles may be on a planar surface or on a curvedsurface. FIG. 3B shows a top view of the transceiver tile 210 thatincludes one or more piezoelectric elements 302 according to embodimentsof the present disclosure. As depicted, the transceiver tile 210 mayinclude a transceiver substrate 304 and one or more piezoelectricelements 302 arranged on the transceiver substrate 304.

Unlike the conventional systems that use bulk piezoelectric elements, inembodiments, the pMUT array 302 may be formed on a wafer and the wafermay be diced to form multiple transceiver tiles 210. This process mayreduce the manufacturing cost since the transceiver tiles 210 may befabricated in high volume and at low cost. In embodiments, the diameterof the wafer may range 6˜12 inches and many pMUT arrays may be batchmanufactured. Further, in embodiments, as discussed in conjunction withFIGS. 18 and 19 , the integrated circuits for controlling the pMUT array302 may be formed in an ASIC chip so that the pMUT array 302 may beconnected to the matching integrated circuits in close proximity,preferably within 25 μm-100 μm. For example, the transceiver tile 210may have 1024 pMUT elements 302 and be connected to a matching ASIC chipthat has the appropriate number of circuits for driving the 1024 pMUTelements 302.

In embodiments, each piezoelectric element 302 may have any suitableshape such as, square, rectangle, and circle, so on. In embodiments, twoor more piezoelectric elements may be connected to form a larger pixelelement. As depicted in FIG. 3B, when building an imager, it isdesirable to have a two dimensional array of piezoelectric element 302,arranged in orthogonal directions. In embodiments, to create a lineelement, a column of N piezoelectric elements 302 may be connectedelectrically in parallel. Then, this line element may providetransmission and reception of ultrasonic signals similar to thoseachieved by a continuous piezoelectric element that is almost N timeslonger than each element. This line element may be called a column orline or line element interchangeably. It is understood that tiles may bearranged in other shape such as circular, or other shapes. Inembodiments, one or more temperature sensors 320 may be installed in thetransducer tile 210 to measure the temperature of the tile 210. It isnoted that the imager 120 may include one or more temperature sensorsfor measuring temperatures at various locations of the imager 120.

To mimic a line element of the conventional designs, the shape of apiezoelectric element of a given width may need to be very tall. Forexample, a line element of a conventional design may be 280 μm in widthand 8000 μm tall, while the thickness may be 100 μm. However, on thetransceiver tile 210, it is advantageous to design a line element usinga plurality of identical piezoelectric elements 302, where each elementmay have its characteristic center frequency. In embodiments, when aplurality of the piezoelectric elements 302 are connected together, thecomposite structure (i.e. the line element) may act as one line elementwith a center frequency that consists of the center frequencies of allthe element pixels. In modern semiconductor processes, these centerfrequencies match well to each other and have a very small deviationfrom the center frequency of the line element. It is also possible tomix several pixels of somewhat different center frequencies to create awide bandwidth line compared to lines using only one central frequency.

In embodiments, the piezoelectric elements 302 have a suspended membraneassociated with them that vibrates at a center frequency when exposed tostimulus at that frequency and behave like resonators. There is aselectivity associated with these resonators, known as a Q factor. Inembodiments, for ultrasound imagers, Q may be usually designed to be low(close 1 or thereabouts) and achieved by a combination of design of thepixels and loading applied to the pixels in actual use. In embodiments,the loading may be provided by application of a layer of RTV or othermaterial to the top face of the piezoelectric elements, where theloading may facilitate closer impedance matching between the transducersurface emitting and receiving the pressure waves and the human bodypart being imaged. In embodiments, the low Q and the well matched centerfrequency may allow the line element to essentially act like a lineimaging element with substantially one center frequency. In embodiments,loading may also include a matching layer below the transducers, wherethe emitted waveform is absorbed by an acoustic absorber.

In embodiments, for instance, each piezoelectric element 302 may bespaced 250 μm from each other center to center. Further to simplify, saythey are square in shape. Now, let's say, to mimic a conventional lineelement, a column of the piezoelectric elements 302 may be connected toeach other. For example, 24 piezoelectric elements 302 in a column maycreate a line element of roughly 6 mm in elevation, with each elementbeing 0.25 mm in width. In embodiments, this connection may be achievedat wafer level using a metal interconnect layer.

It is noted that the transceiver tile 210 may include one or moremembranes that suspend from the substrate and the piezoelectric elements302 may be disposed on the membranes. In embodiments, as described belowin conjunction with FIGS. 4-8 , a membrane may be disposed under each ofthe piezoelectric elements 302. In embodiments, more than onepiezoelectric elements may be disposed on one membrane 309. Inembodiments, more than one membrane may be disposed under one of thepiezoelectric elements 302. More information on the arrangement ofpiezoelectric elements on a membrane may be found in a copending U.S.patent application Ser. No. 15/820,319, entitled “Imaging devices havingpiezoelectric transducers,” filed on Nov. 21, 2017, which is hereinincorporated by reference in its entirety.

For the conventional bulk piezoelectric elements, the voltage potentialacross the top and bottom electrodes ranges 100V˜200V. For theconventional pMUTs, the voltage potential across the top and bottomelectrodes is about 30V. In embodiments, in order to reduce this voltagefurther, the piezoelectric elements 302 may include a scaled down thinpiezoelectric layer, and the piezoelectric layer may have a thickness inthe order of 2 μm or less. FIGS. 4-8 show steps for fabricating anexemplary piezoelectric element according to embodiments of the presentdisclosure. FIG. 4 shows a top view of a membrane 406 disposed on asubstrate 402 and FIG. 5 shows a cross sectional view of the membraneand substrate, taken along the line 4-4 according to embodiments of thepresent disclosure. (In embodiments, the substrate 402 may correspond tothe transceiver substrate 304 in FIG. 3B.) As depicted, in embodiments,a membrane layer 404 may be deposited on the substrate 402 and a cavity408 may be formed to remove a portion of the substrate 402, to therebyform the membrane 406 that may vibrate relative to the substrate 402 inthe vertical direction. In embodiment, the cavity 408 may be formed byconventional wafer processing techniques, such as etching. Inembodiments, the substrate 402 may be formed of the same material as themembrane layer 404. In alternative embodiments, the substrate 402 may beformed of a different material from the membrane layer 404. It is notedthat the cavity 408 may be formed after the other components, such astop conductor (812 in FIG. 8 ), of the piezoelectric element is formed.

In embodiments, the membrane 406 has a circular projection area.However, it should be apparent to those of ordinary skill in the artthat the membrane 406 may have other suitable geometrical shape.

FIG. 6 shows a top view of a bottom electrode 602 disposed on themembrane layer 404 and arranged over the membrane 406 according toembodiments of the present disclosure. FIG. 7 shows a top view of apiezoelectric layer 706 disposed on the bottom electrode 602 accordingto embodiments of the present disclosure. In embodiments, thepiezoelectric layer 706 may have the similar projection area as thebottom electrode 602 so that the piezoelectric layer 706 may cover theentire portion of the bottom electrode 602.

FIG. 8 shows a top view of a piezoelectric element according toembodiments of the present disclosure. As depicted, a top electrode 808may be disposed on the piezoelectric layer 706 and arranged over themembrane 406. In embodiments, a conductor 812 may be disposed on andelectrically coupled to the top electrode 808, while conductors 810 and811 may reach the bottom electrode 602 through one or more vias 814. Inembodiments, the top electrode 808, the piezoelectric layer 706 and thebottom electrode 602 may form a two terminal piezoelectric element andthe membrane 406 may vibrate when an electrical voltage is appliedacross the top and bottom electrodes. In embodiments, electrical chargemay be developed in the top and bottom electrodes when the membrane isdeformed by a pressure wave during a receive mode/process.

FIG. 9 shows a schematic diagram of a piezoelectric element 900according to embodiments of the present disclosure. As depicted, apiezoelectric layer 910 may be disposed between a first electrode (X)906 and a second electrode (O) 904. In embodiments, the first electrode(X) 906 may be connected to a ground or a DC bias via the conductor (X)908 and the second electrode (O) 904 may be connected to an electricalcircuit (not shown in FIG. 9 ) through a signal conductor (O) 902. Inembodiments, the piezoelectric element 800 in FIG. 8 is an exemplaryimplementation of the piezoelectric element 900 and the piezoelectricelement 900 may be disposed on a membrane layer (such as 404 in FIG. 5).

In the conventional piezoelectric elements, the piezoelectric layer isthick, approaching around 100 μm and typically an AC voltage of +100 to−100 V across the piezoelectric layer is required to create anultrasonic pressure wave of sufficient strength to enable medicalimaging. The frequency of this AC drive signal is typically around theresonating frequency of the piezoelectric structure, and typically above1 MHz for medical imaging applications. In the conventional systems, thepower dissipated in driving the piezoelectric element is proportional toC*V², where C is capacitance of the piezoelectric element and V is themaximum voltage across the piezoelectric layer. Typically, whentransmitting pressure waves, multiple piezoelectric lines are driventogether with somewhat different phase delays to focus the pressurewaves or to steer a propagation direction of the pressure waves. Thesimultaneous drive of multiple piezoelectric lines causes thetemperature at the surface of the piezoelectric elements to rise. Ingeneral, it is highly desirable not to exceed a certain thresholdtemperature, so as not to injure the subject being imaged. This limitsthe number of lines that can be driven and the time period for whichthey can be driven.

In embodiments, the piezoelectric layer 910 is much thinner,approximately 1 to 2 μm thick, compared to the conventional bulkpiezoelectric elements. In embodiments, this large reduction inthickness may enable the use of lower voltage drive signals for thepiezoelectric element 900, where the voltage is lowered approximately bythe amount by which the thickness of the piezoelectric layer 910 islowered to maintain the similar electric field strength. For example, inembodiments, the voltage potential across the two electrodes 904 and 906may range from around 1.8 V to 12.6 V peak to peak. The capacitance ofthe piezoelectric element 900 may increase due to the reduction inthickness of the piezoelectric layer 910 for similar piezoelectricmaterial. For instance, when the drive voltage is decreased by a factorof 10 while the thickness of the piezoelectric layer 910 is alsodecreased by a factor of 10, the capacitance increases by a factor of 10and the power dissipation decreases by a factor of 10. This reduction inpower dissipation also reduces heat generation and temperature rise inthe piezoelectric element. Thus, in embodiments, using lower drivevoltages and thinner piezoelectric layer, compared to the conventionalpiezoelectric elements, the temperature of the pMUT surface may belowered. Alternately, in embodiments, for a given temperature, more pMUTelements may be driven simultaneously to illuminate the larger targetarea, compared to the conventional piezoelectric elements. This mayallow faster scanning of the target, especially if multiple emissionsare needed to scan the entire portion of the target to form one image.In embodiments, a target area may be scanned with multiple emissionsusing different steering angles and the obtained image data may becombined to obtain a higher quality image.

Compared to the conventional bulk piezoelectric elements, inembodiments, the ability to drive more piezoelectric elementssimultaneously may allow more coverage of the transducer aperture peremission, minimizing the number of emissions needed to cover the entireaperture, thus increasing frame rates. A frame rate measures how manytimes a target is imaged per minute. It is desirable to image at a highframe rate, especially when tissue motion is involved since the movingtissue may make the image blurry. In embodiments, the imager 120 thatoperates at a higher frame rate may be able to generate images ofenhanced quality, compared to the conventional bulk piezoelectricelements.

In embodiments, image quality may be improved by compounding severalframes of images into one resultant lower noise frame. In embodiments,by using low voltage and low power pMUTs with a high frame rate,compared to the conventional bulk piezoelectric elements, for a givenrise in the pMUT temperature, this averaging technique may be feasibleto enhance the image quality. In embodiments, the synthetic aperturemethod of ultrasound imaging may be used to allow compounding of images.The various frames of images may also be with different steering anglesor from orthogonal steering directions to better view the target.

FIG. 10A shows a schematic diagram of a piezoelectric element 1000according to embodiments of the present disclosure. FIG. 10B shows asymbolic representation of the piezoelectric element 1000 in FIG. 10A.As depicted, the piezoelectric element 1000 is similar to thepiezoelectric element 900, with the difference that the piezoelectricelement 1000 has more than two electrodes. More specifically, thepiezoelectric element 1000 may include: atop electrode (O) 100, a firstbottom electrode (X) 1006; a second bottom electrode (T) 1012; apiezoelectric layer 1010 disposed between the top and bottom electrodes;and three conductors 1002, 1008 and 1014 that are electrically coupledto the bottom and top electrodes 1004, 1006 and 1012, respectively.(Hereinafter, the terms top and bottom merely refer to two oppositesides of the piezoelectric layer, i.e., the top electrode is notnecessarily disposed over the bottom electrode.)

While a unimorph piezoelectric element is shown in FIG. 10A purely forthe purpose of illustration, in embodiments, a multiplayer piezoelectricelement composed of a plurality of piezoelectric sublayers andelectrodes can be utilized. In embodiments, the piezoelectric layer 1010may include at least one of PZT, PZT-N, PMN-Pt, AlN, Sc—AlN, ZnO, PVDF,and LiNiO₃.

FIG. 10C shows a schematic cross sectional diagram of the piezoelectricelement 1000 according to embodiments of the present disclosure. Asdepicted, the piezoelectric element 1000 may be disposed on a membranelayer 1034 that is supported by a substrate 1030. In embodiments, acavity 1032 may be formed in the substrate 1030 to define a membrane. Inembodiments, the membrane layer 1034 may be formed by depositing SiO₂ onthe substrate 1030.

In embodiments, the piezoelectric element 1000 may include apiezoelectric layer 1010 and a first electrode (O) 1002 that iselectrically connected to a signal conductor (O) 1004. In embodiments,the signal conductor (O) 1004 may be formed by depositing TiO₂ and metallayers on the membrane layer 1034. In embodiments, the piezoelectriclayer 1010 may be formed by the sputtering technique or by the Sol Gelprocess.

In embodiments, a second electrode (X) 1006 may be grown above thepiezoelectric layer 1010 and electrically connected to a secondconductor 1008. A third electrode (T) 1012 may be also grown above thepiezoelectric layer 1010 and disposed adjacent to the second conductor1012 but electrically isolated from the second conductor (X) 1008. Inembodiments, the second electrode (X) 1006 and third electrode (T) 1012may be formed by depositing one metal layer on the piezoelectric layer1010 and patterning the metal layer. In embodiments, the projectionareas of the electrodes 1002, 1006 and 1012 may have any suitable shape,such as square, rectangle, circle, and ellipse, so on.

As in the piezoelectric element 1000, the first electrode (O) 1002 maybe electrically connected to the conductor (O) 1004 using a metal, a viaand interlayer dielectrics. In embodiments, the first electrode (O) 1002may be in direct contact with the piezoelectric layer 1010. The thirdconductor (T) 1014 may be deposited or grown on the other side of thepiezoelectric layer 1010 with respect to the first electrode (O) 1002.

FIG. 10D shows a schematic diagram of a piezoelectric element 1030according to embodiments of the present disclosure. As depicted, thepiezoelectric element 1030 may include two sub piezoelectric elements(or shortly sub elements) 1031-1 and 1031-2. In embodiments, each subelement may be a three terminal device, i.e. it may have one topelectrode 1032-1 (or 1032-2), two bottom electrodes 1034-1 (or 1034-2)and 1036-1 (or 1036-2), and one piezoelectric layer 1035-1 (or 1035-2).In embodiments, the top electrode 1032-1 may be electrically connectedto the top electrode 1032-2 by a common conductor (O) 1031, the firstbottom electrode (X) 1034-1 may be electrically connected to the firstbottom electrode (X) 1034-2 by a common conductor (X) 1038, and thesecond bottom electrode (T) 1036-1 may be electrically connected to thesecond bottom electrode (T) 1036-2 by a common conductor (T) 1040. Inembodiments, the piezoelectric element 1030 may be disposed on onemembrane or each sub element may be disposed on a separate membrane. Itshould be apparent to those of ordinary skill in the art that theconductor (O) 1032-1 may be electrically connected to the electrode (O)1031, using metals, vias, interlayer dielectrics (ILD), so on, in thesimilar manner as the piezoelectric element illustrated in FIGS. 12-16 .

In embodiments, the conductor (X) 1038 and the conductor (T) 1040 may beall grounded (or connected to a DC bias) during active operation of theimager. In embodiments, the electrodes (O) 1032-1 and 1032-2 may bedriven by a common transmit driver circuit and a common electricalsignal, typically a signal waveform around the center frequency of thetransducer. For example, if the center frequency is 2 MHz, a sinusoidalwaveform or square waveform at 2 MHz is applied to the piezoelectricelement 1030. This waveform may cause the piezoelectric element 1030 toresonate at 2 MHz and send out a pressure wave, such as 122, from thesurface of the transducer. The pressure wave may be reflected from thetarget organ to be imaged. In embodiments, the reflected pressure wavemay hit the piezoelectric element 1030 which is now connected to asignal receiver. The pressure wave may be converted to the electricalcharge in the piezoelectric element 1030 by the piezoelectric layers1035-1 and 1035-2. In embodiments, this charge may be signal processedby amplifiers, filters and eventually digitized by an A/D converter (notshown in FIG. 10D), followed by digital decimators with the dataeventually interfaced to FPGAs or Graphical Processing Units (GPUs).These processed signals from multiple piezoelectric elements may be thenreconstructed into images. The signal waveform driving the transmitdriver can also be a frequency varying signal or a phase varying signalor other complex coded signals, such as chirps or Golay codes

FIG. 10E shows a schematic diagram of a piezoelectric element 1050according to embodiments of the present disclosure. As depicted, thepiezoelectric element 1050 may include two sub elements 1051-1 and1051-2. In embodiments, each sub element may be a two terminal device,i.e. it may have one top electrode 1052-1 (or 1052-2), one bottomelectrode 1054-1 (or 1054-2), and one piezoelectric layer 1056-1 (or1056-2). In embodiments, the top electrode (O) 1052-1 may beelectrically connected to the top electrode (O) 1052-2 by a commonconductor (O) 1051, and the bottom electrode (X) 1054-1 may beelectrically connected to the bottom electrode (X) 1054-2 by a commonconductor (X) 1058. In embodiments, the piezoelectric element 1050 maybe disposed on one membrane or each sub element may be disposed on aseparate membrane.

FIG. 10F shows a schematic diagram of a piezoelectric element 1070according to embodiments of the present disclosure. FIG. 10G shows abottom view of the piezoelectric element 1070 according to embodimentsof the present disclosure. As depicted, the piezoelectric element 1070may include: a top electrode (O) 1074, a first bottom electrode (X)1080; a second bottom electrode (T) 1076; a piezoelectric layer 1075disposed between the top and bottom electrodes; and three conductors1072, 1078 and 1082 that are electrically coupled to the bottom and topelectrodes 1074, 1076 and 1080, respectively. (In FIG. 10G, theconductors are not shown.) In embodiments, each of the first and secondbottom electrodes has an annular shape and the second bottom electrode(X) 1076 surrounds the first bottom electrode (T) 1080.

FIG. 10H shows a schematic diagram of a piezoelectric element 1085according to embodiments of the present disclosure. As depicted, thepiezoelectric element 1085 may utilize transverse mode of operation andinclude: a substrate 1091, a membrane 1090 secured to the substrate atone end; a bottom electrode (O) 1092 that is electrically coupled to aconductor 1089; a piezoelectric layer 1088; and a top electrode 1086that is electrically coupled to a conductor 1087. In embodiments, themembrane 1090 may be secured to the substrate 1091 at one end so as tovibrate in the transverse mode, as indicated by an arrow 1093, i.e., thepiezoelectric element may operate in the transverse mode.

It is noted that the piezoelectric element 1085 may have any suitablenumber of top electrodes. Also, it is noted that more than onepiezoelectric element may be installed on the membrane 1090. It isfurther noted that the substrate 1091 and membrane 1090 may be formed ofone monolithic body and the membrane is formed by etching the substrate.

FIG. 11 shows a schematic diagram of a piezoelectric element 1100according to embodiments of the present disclosure. As depicted, anelectrode (O) 1104 may be disposed on the top surface of a piezoelectriclayer 1110 and electrically connected to a conductor (O) 1102 that maybe connected to an electric circuit. The conductor (T1) 1108, conductor(T2) 1114 and conductor (X) 1118 may be connected to the bottomelectrode (T1) 1106, electrode (T2) 1112 and electrode (X) 1116,respectively. The electrode (T1) 1106, the electrode (X) 1116 and theelectrode (T2) 1112 may be disposed on the bottom surface of thepiezoelectric layer 1110. In embodiments, the piezoelectric element 1100may be disposed on one membrane or three separate membranes.

FIGS. 10A-11 show piezoelectric elements (or sub elements) that eachhave either two terminal (O and X) or three terminals (O, X, and T) orfour terminals (O, X, T1 and T2). However, it should be apparent tothose of ordinary skill in the art that more than a piezoelectricelement (or sub element) may have more than four terminals. Forinstance, a piezoelectric element may have top bottom (O) electrode andmore than three bottom electrodes.

FIG. 12-16 show steps for fabricating an exemplary piezoelectric elementthat has four terminals according to embodiments of the presentdisclosure. FIG. 12 show top view of a membrane 1206, which may beformed by forming a membrane layer 1204 on a substrate 1202, and forminga cavity 1208 in the substrate. FIG. 13 shows a cross sectional view ofthe structure in FIG. 12 , taken along the line 12-12. In embodiments,the membrane 1204 may be deposited by a suitable wafer processingtechnique.

FIG. 14 shows a top view of a layer structure formed on the membranelayer 1204 and FIG. 15 shows a cross sectional view of the layerstructure in FIG. 14 , taken along the line 14-14, according toembodiments of the present disclosure. As depicted, three top electrodes1223, 1224-1, and 1224-2, a piezoelectric layer 1220, and a bottomelectrode 1222, may be formed on the membrane layer 1204. Inembodiments, the top electrodes 1223, 1224-1, and 1224-2, piezoelectriclayer 1220, and bottom electrode 1222 may be deposited by suitable waferprocessing techniques, such as deposition, sputtering, patterning so on.

FIG. 16 shows a top view of a piezoelectric element 1600 according toembodiments of the present disclosure. As depicted, three conductors1620, 1622-1, and 1622-2 may be electrically coupled to the electrodes1223, 1224-1, and 1224-2, respectively. Also, the conductors (O) 1610may be electrically coupled to the bottom electrode 1222 through one ormore vias 1614. In embodiments, electrical grounds and source planes maybe reached to the bottom electrode 1222 through the vias 1614 and theconductors (O) 1610. In embodiments, each of the conductors 1620,1622-1, and 1622-2 may be connected to the ground or a DC bias voltage.In embodiments, the conductor 1620, may be connected to the ground or afirst DC bias voltage, and the conductors 1622-1 and 1622-2 may beconnected to the ground or a second DC bias voltage.

In general, due to the inherent non-symmetry in the crystallinestructure of piezoelectric material, an electrical polarity develops,creating electric dipoles. In a macroscopic crystalline structure, thedipoles are by default found to be randomly oriented as shown in FIG.17A on the left. When the material is subjected to a mechanical stress,each dipole rotates from its original orientation toward a directionthat minimizes the overall electrical and mechanical energy stored inthe dipole. If all the dipoles are initially randomly oriented (i.e. anet polarization of zero), their rotation may not significantly changethe macroscopic net polarization of the material; hence, thepiezoelectric effect exhibited will be negligible. Therefore, during aninitial state, the dipoles need to be more-or-less oriented in the samedirection, which is referred to as poling process. The direction alongwhich the dipoles align is known as the poling direction. FIG. 17 showsdipole orientations of a piezoelectric material before, during and afterthe poling process according to embodiments of the present disclosure.

As depicted, before the poling process, the individual dipole momentsare not aligned. During the poling process, the dipole moments may bealigned to point the same direction. After poling, the dipole momentsmay remain fairly aligned, although there may still be some elements ofrandom direction. In embodiments, the poling process may be performed byputting the piezoelectric material in a constant electric field at ahigh temperature to thereby force the dipoles to align.

In embodiments, the piezoelectric element 1000 in FIG. 10A may be poledso that the portions of the piezoelectric layer over the electrode (X)1006 and electrode (T) 1012 may be poled in opposite directions. Thistype of poling may result in boosted pressure output for the sametransmit voltage, compared to the pressure output that would be obtainedusing the one poling direction configuration. Also, in embodiments, thistype of poling may improve the receive sensitivity, where the reflectedpressure waves may be differentially boosted to create a larger chargeoutput, compared to the one poling direction configuration.

FIG. 17B shows a flow chart of an illustrative process for poling apiezoelectric element 1600 according to embodiments of the presentdisclosure. To pole the piezoelectric element 1600, the piezoelectricelement 1600 may be mounted inside a high temperature chamber (step1728) and the bottom electrode 1222 may be coupled to the ground (step1722), while the first top electrode 1224-1 (or 1224-2) may be coupledto a high positive voltage, such as 15 V, (step 1724) and the second topelectrode 1223 may be coupled to a high negative voltage, such as −15 V,(step 1726). Then, the piezoelectric element 1600 may be subject to ahigh temperature inside the chamber for extended period of time (step1728).

Depending on the polarities of the first and second high voltages, theportions of the piezoelectric layer 1220 under the two electrodes 1224-1and 1224-2 may be polarized in the same or opposite direction to that ofthe portion of the piezoelectric layer 1220 under the electrodes 1223.In embodiments, for instance, poling may be implemented by applicationof high voltages across the electrodes at high temperature, typically150° C., for 30 minutes for certain piezoelectric materials. Forexample, for a 1 μm thick piezoelectric layer, +15 V from the signalelectrode to the T electrode and −15V from the signal electrode to the Xelectrode may be applied. Once the piezoelectric material is poled, theneach of the X and T electrodes may be grounded or tied to a non-zero DCbias voltage while the conductor (O) 1610 may be connected to an ASICchip so as to be driven by a transmit driver during the transmitoperation or may be connected to an LNA (such as 1811 in FIG. 18A) inthe ASIC chip during the receive operation. In embodiments, a DC biasvoltage may improve the sensitivity of the piezoelectric element 1600.

FIG. 18A shows an imaging assembly 1800 according to embodiments of thepresent disclosure. As depicted, the imaging assembly 1800 may include:a transceiver substrate 1802 (which may be similar to the transceivertile 210); and an ASIC chip 1804 electrically coupled to the transceiversubstrate. In embodiments, the transceiver substrate 1802 may includeone or more piezoelectric elements 1806, where each of the piezoelectricelement may be disposed on one or more membranes. In embodiments, morethan one piezoelectric element may be disposed on one membrane. Inembodiments, poling of the piezoelectric layer may be performed afterthe transceiver substrate 1802 is interconnected to the ASIC chip 1804.It is noted that the ASCI 1804 may be replaced by a suitable substratethat includes multiple circuits for driving the piezoelectric elements1806 in the transceiver substrate 1802.

In embodiments, poling may be performed on the transceivertile/substrate 1802 after the transceiver substrate is 3D interconnectedto the ASIC chip 1804. In the conventional piezoelectric elements, it isdifficult to perform the poling process on a transceiver tile after thetransducer tile is coupled to the circuits for driving the piezoelectricelements. It is due to the fact that poling requires application of highvoltages to the circuits for controlling the piezoelectric elements andthe high voltages may damage the circuits. In contrast, in embodiments,the poling may be performed on the transducer substrate 1802 that isalready integrated with the ASIC chip 1804. In embodiments, the ASICchip 1804 may enable application of desired voltages on all firstelectrodes of the piezoelectric elements and high voltages may beapplied to all second or additional electrodes.

In embodiments, each of the piezoelectric elements 1806 a-1806 n mayhave two or more electrodes and these electrodes may be connected todrive/receive electronics housed in the ASIC chip 1804. In embodiments,each piezoelectric element (e.g. 1806 a) may include a top conductorthat is electrically connected to a conductor (O) (e.g. 1814 a) and twobottom electrodes that are electrically connected to conductors (X,T)(e.g. 1810 a and 1812 a). In embodiments, the conductor 1810 a may beelectrically coupled to a DC bias (X) 1832 a or the ground, and theconductor (T) 1812 a may be coupled to a DC bias (T) 1834 a or theground.

In embodiments, the ASIC chip 1804 may include one or more circuits 1842a-1842 n that are each electrically coupled to one or more piezoelectricelements 1806 a-1806 n; and one control unit 1840 for controlling thecircuits 1842 a-1842 n. In embodiments, each circuit (e.g. 1842 a) mayinclude a transmit driver (1813 a), a receiver amplifier (or shortlyamplifier) (e.g. 1811 a), a switch (e.g. 1816 a) having one terminalelectrically coupled to the conductor (O) (1814 a) and another terminalthat toggles between the two conductors coupled to the transmit driver1813 a and amplifier 1811 a. During a transmit (Tx) mode/process, theswitch 1816 a may connect the transmit driver 1813 a to thepiezoelectric element 1806 a so that a signal is transmitted to the topelectrode of the piezoelectric element 1806 a. During a receive (Rx)mode/process, the switch 1816 a may connect the amplifier 1811 a to thepiezoelectric element 1806 a so that a signal is transmitted from thetop electrode of the piezoelectric element 1806 a to the amplifier 1811a.

It is noted that the transmit driver 1813 a may include variouselectrical components. However, for brevity, the transmit driver 1813 ais represented by one driver. But, it should be apparent to those ofordinary skill in the art that the transmit driver may include a morecomplex driver with many functions. Electrical components for processingthe received signals may be connected to the amplifier 1811 a, eventhough only one amplifier 1811 a is shown in FIG. 18A. In embodiments,the amplifier 1811 a may be a low noise amplifier (LNA). In embodiments,the circuit 1842 n may have the same or similar structure as the circuit1842 a.

In embodiments, all of the DC biases (X) 1832 a-1832 n may be connectedto the same DC bias or the ground, i.e., all of the conductors (X) 1810a-1810 n may be connected to a single DC bias or the ground. Similarly,all of the DC biases (X) 1834 a-1834 n may be connected to the same DCbias or a different DC bias, i.e., all of the conductors (T) 1812 a-1812n may be connected to a single DC bias or the ground.

In embodiments, the conductors (X, T and O) 1810, 1812, and 1814 may beconnected to the ASIC chip 1804 using an interconnect technology—forinstance, copper pillar interconnects or bumps (such as 1882 in FIG.18B), as indicated by an arrow 1880. In embodiments, the circuitrycomponents in the ASIC chip 1804 may communicate outside the ASIC chip1804 using an interconnect 1830. In embodiments, the interconnect 1830may be implemented using bonding wires from pads on the ASIC chip 1804to another pad outside the ASIC chip. In embodiments, other types ofinterconnects, such as bump pads or redistribution bumps on the ASICchip 1804 may be used in addition to wire bonded pads.

In embodiments, the LNAs 1811 included in the circuits 1842 may beimplemented outside the ASIC chip 1804, such as part of a receive analogfront end (AFE). In embodiments, a LNA may reside in the ASIC chip 1804and another LNA and programmable gain amplifier (PGA) may reside in theAFE. The gain of each LNA 1811 may be programmed in real time, allowingthe LNA to be part of a time gain compensation function (TGC) needed forthe imager.

In embodiments, the LNAs 1811 may be built using low voltage transistortechnologies and, as such, may be damaged if they are exposed to hightransmit voltages that the conventional transducers need. Therefore inthe conventional systems, a high voltage transmit/receive switch is usedto separate the high transmit voltages from the low voltage receivecircuitry. Such a switch may be large and expensive, use High Voltage(HV) processes, and degrade the signal sent to LNA. In contrast, inembodiments, low voltages may be used, and as such, the high voltagecomponents of the conventional system may not be needed any more. Also,in embodiments, by eliminating the conventional HV switch, theperformance degradation caused by the conventional HV switch may beavoided.

In embodiments, the piezoelectric elements 1806 may be connected to theLNAs 1811 during the receive mode by the switches 1816. The LNAs 1811may convert the electrical charge in the piezoelectric elements 1806generated by the reflected pressure waves exerting pressure on thepiezoelectric elements, to an amplified voltage signal with low noise.The signal to noise ratio of the received signal may be among the keyfactors that determine the quality of the image being reconstructed. Itis thus desirable to reduce inherent noise in the LNA itself. Inembodiments, the noise may be reduced by increasing the transconductanceof the input stage of the LNAs 1811, such as using more current in theinput stage. The increase in current may cause the increase in powerdissipation and heat. In embodiments, pMUTs 1806 may be operated withlow voltages and be in close proximity to the ASIC chip 1804, and assuch, the power saved by the low voltage pMUTs 1806 may be utilized tolower noise in the LNAs 1811 for a given total temperature riseacceptable, compared to conventional transducers operated with highvoltages.

FIG. 18B shows a schematic diagram of an imaging assembly 1850 accordingto embodiments of the present disclosure. In embodiments, thetransceiver substrate 1852 and ASIC chip 1854 may be similar to thetransceiver substrate 1802 and ASIC chip 1804, respectively. In theconventional systems, the electronics for driving piezoelectrictransducers is typically located far away from the piezoelectrictransducers and are connected to the piezoelectric transducers using acoax cable. In general, the coax cable increases parasitic loading, suchas additional capacitance, on the electronics, and the additionalcapacitance causes loss in critical performance parameters, such asincrease in noise and loss of signal power. In contrast, as depicted inFIG. 18B, the transmit driver or drivers (or equivalently circuits) 1862a-1862 n may be connected directly to piezoelectric elements (orequivalently pixels) 1856 a-1856 n+i using a low impedance threedimensional (3D) interconnect mechanism (as indicated by an arrow 1880),such as Cu pillars or solder bumps 1882, or wafer bonding or similarapproaches or a combination of such techniques. In embodiments, uponintegrating the transceiver substrate 1852 to the ASIC chip 1854, thecircuits 1862 may be located less than 100 μm vertically (or so) awayfrom the piezoelectric elements 1856. In embodiments, any conventionaldevice for impedance matching between driver circuits 1862 andpiezoelectric elements 1856 may not be required, further simplifyingdesign and increasing power efficiency of the imaging assembly 1800.Impedance of the circuits 1862 may be designed to match the requirementof the piezoelectric elements 1856.

In embodiments, in FIG. 18A, each of the piezoelectric elements 1806a-1806 n may be electrically connected to a corresponding one of thecircuits 1842 a-1842 n located in the ASIC chip 1804. In embodiments,this arrangement may allow the imager to generate three-dimensionalimages. Similarly, in FIG. 18B, each of the piezoelectric elements 1856a-1856 m may have three leads represented by X, T, and O. The leads fromeach of the piezoelectric elements may be electrically connected to acorresponding one of the circuits 1862 a-1862 m located in the ASIC chip1854 by the interconnect means 1882. In addition, in embodiments, a lineof piezoelectric elements, such as 1856 n+1-1856 n+i may be electricallycoupled to one common circuit 1862 n. In embodiments, the transmitdriver circuit 1862 n may be implemented with one transmit driver. Inalternative embodiment, the transmit driver circuit 1862 n may beimplemented with multilevel drivers to facilitate various imaging modes.

It should be apparent to those of ordinary skill in the art that theASIC chip 1854 may have any suitable number of circuits that are similarto the circuit 1862 n. In embodiments, the control unit 1892 may havecapability to configure the piezoelectric elements, either horizontallyor vertically in a two dimensional pixel array, configure their lengthand put them into transmit or receive or poling mode or idle mode. Inembodiments, the control unit 1892 may perform the poling process afterthe transceiver substrate 1852 is combined with the ASIC chip 1854 bythe three dimensional integration technique 1882. In embodiments, thetransmit driver circuit 1843 may be implemented with multilevel drive asshown in FIG. 34 , where the transmit driver output may have more than 2output levels. FIG. 34 shows an embodiment where the output level may be0V or 6V or 12V. It is understood that that these voltages can bedifferent, for example they can be −5V, 0V and +5V. The transmit drivercan also be a 2 level driver with drive signal as shown in FIG. 33 .

In embodiments, lead lines 1882 a-1882 n may be signal conductors thatare used to apply pulses to the electrodes (O) of the piezoelectricelements 1856. Similarly, the lead lines 1884 a-1884 n, 1886 a-1886 n,and 1888 a-1888 n may be used to communicate signals with thepiezoelectric elements 1856 a-1856 n+i. It is noted that other suitablenumber of lead lines may be used to communicate signals/data with theimaging assembly 1800.

In embodiments, each of the lead lines (X) 1886 and lead lines (T) 1888may be connected to the ground or a DC bias terminal. In embodiments,the digital control lead 1894 may be a digital control bus and includeone or more leads that are needed to control and address the variousfunctions in the imaging assembly 1850. These leads, for example, mayallow programmability of the ASIC chip 1854 using communicationprotocols, such as Serial Peripheral Interface (SPI) or other protocols.

In embodiments, the piezoelectric elements 1806 (or 1856) and thecontrol electronics/circuits 1842 (or 1862) may be developed on the samesemiconductor wafer. In alternative embodiments, the transceiversubstrate 1802 (or 1852) and ASIC chip 1804 (or 1854) may bemanufactured separately and combined to each other by a 3D interconnecttechnology, such as metal interconnect technology using bumps 1882. Inembodiments, the interconnect technology may eliminate the low yieldmultiplication effect, to thereby lower the manufacturing cost andindependently maximize the yield of components.

In embodiments, lead lines 1862 a-1862 n may be signal conductors thatare used to apply pulses to the electrodes (O) of the piezoelectricelements 1806. Similarly, the lead lines 1864 a-1864 n, 1866 a-1866 n,and 1868 a-1868 n may be used to communicate signals with thepiezoelectric elements 1806 a-1806 n. It is noted that other suitablenumber of lead lines may be used to communicate signals/data with theimaging assembly 1800.

As discussed above, the LNAs 1811 may operate in a charge sensing modeand each have a programmable gain that may be configured in real time toprovide gain compensation. In embodiments, as discussed in conjunctionwith FIG. 3B, one or more temperature sensors may be installed in theimager 120. In embodiments, the ASIC may receive temperature data fromthe temperature sensor(s) and, using the temperature data, adjust theimaging frame rate or a signal-to-noise ratio of the LNAs 1811.

FIG. 19A-1 shows a top view of a transceiver substrate 1902 and an ASICchip 1906 and FIG. 19A-2 shows a side view of imaging assembly 1901according to embodiments of the present disclosure. As depicted, theimaging assembly 1901 may include the transceiver substrate 1902 that isinterconnected to the ASIC chip 1906 by suitable interconnectionmechanism, such as bumps. Hereinafter, the bumps are shown as theinterconnection mechanism, even though other suitable interconnectionmechanisms may be used in place of the bumps.

In embodiments, each piezoelectric element 1904 may be a two terminalpiezoelectric element, where the piezoelectric element is symbolicallyrepresented by two electrodes O and X. In embodiments, the circuitelement 1908 may include electrical components for driving thecorresponding piezoelectric element 1904, where the circuit element 1908is symbolically represented by a transmit driver. In embodiments, animaging element 1910 may include a piezoelectric element 1904 and acircuit element 1908, and the piezoelectric element 1904 may beelectrically connected to the circuit element 1908 by two bumps.

FIG. 19B-1 shows atop view of a transceiver substrate 1911 and an ASICchip 1913 and FIG. 19B-2 shows a side view of imaging assembly 1915according to embodiments of the present disclosure. As depicted, theimaging assembly 1915 may be similar to the imaging assembly 1901, withthe difference that two sub piezoelectric elements are electricallycoupled to two sub circuit elements by three bumps. More specifically,the piezoelectric element 1912 includes two sub piezoelectric elements,each sub piezoelectric element may be a two terminal piezoelectricelement, and the X electrodes of the two sub piezoelectric elements maybe electrically coupled to each other. In embodiments, each O electrodeof the sub piezoelectric element may be electrically coupled to atransmit driver of the corresponding sub circuit element 1914 and the Xelectrodes of the two sub piezoelectric elements may be electricallycoupled to a common electrical terminal of the circuit element 1914. Assuch, in each imaging element 1917, the piezoelectric element 1912 maybe interconnected to the circuit element 1914 by three bumps.

FIG. 19C shows a top view of a transceiver substrate 1920 and an ASICchip 1924 according to embodiments of the present disclosure. Asdepicted, the transceiver substrate 1920 may be similar to thetransceiver substrate 1902, with the difference that three subpiezoelectric elements are electrically coupled to three sub circuitelements by four bumps. More specifically, the piezoelectric element1922 includes three sub piezoelectric elements, each sub piezoelectricelement may be a two terminal piezoelectric element, and the Xelectrodes of the three sub piezoelectric elements may be electricallycoupled to each other. In embodiments, each O electrode of the subpiezoelectric element may be electrically coupled to a transmit driverof the corresponding sub circuit element and the X electrodes of thethree sub piezoelectric elements may be electrically coupled to a commonelectrical terminal of the circuit element 1926. As such, thepiezoelectric element 1922 may be interconnected to the circuit element1926 by four bumps.

It is noted that the piezoelectric element may have more than twoterminals. FIG. 19D shows a top view of a transceiver substrate 1930 andan ASIC chip 1934 according to embodiments of the present disclosure. Asdepicted, the transceiver substrate 1930 may be similar to thetransceiver substrate 1902, with the difference that each piezoelectricelement 1932 may be electrically coupled to a circuit element 1936 bythree bumps. In embodiments, the O electrode may be coupled to atransmit driver of the circuit element 1936 by a bump, and the X and Telectrodes may be coupled to the circuit element 1936 by two bumps.

FIG. 19E shows a top view of a transceiver substrate 1940 and an ASICchip 1944 according to embodiments of the present disclosure. Asdepicted, the piezoelectric element 1942 may include two subpiezoelectric elements, each sub piezoelectric element may be a threeterminal piezoelectric element, and the X electrodes of the two subpiezoelectric elements may be electrically coupled to each other. Inembodiments, each O electrode of the sub piezoelectric element may beelectrically coupled to a transmit driver of the corresponding subcircuit element by a bump and the X electrodes of the two subpiezoelectric elements may be electrically coupled to the circuitelement 1946 by a bump and each T electrode of the sub piezoelectricelement may be electrically coupled to the circuit element 1946 by abump. As such, the piezoelectric element 1942 may be interconnected tothe circuit element 1946 by five bumps.

FIG. 19F shows a top view of a transceiver substrate 1950 and an ASICchip 1954 according to embodiments of the present disclosure. Asdepicted, the piezoelectric element 1952 may include two subpiezoelectric elements, each sub piezoelectric element may be a threeterminal piezoelectric element, the X electrodes of the two subpiezoelectric elements may be electrically coupled to each other, and Telectrodes of the two sub piezoelectric elements may be electricallycoupled to each other. In embodiments, each O electrode of the subpiezoelectric element may be electrically coupled to a transmit driverof the corresponding sub circuit element by a bump and the X electrodesof the two sub piezoelectric elements may be electrically coupled to thecircuit element 1956 by a bump. Also, the T electrodes of the two subpiezoelectric elements may be electrically coupled to the circuitelement 1956 by a bump. As such, the piezoelectric element 1952 may beinterconnected to the circuit element 1956 by four bumps.

FIG. 19G shows a top view of a transceiver substrate 1960 and an ASICchip 1964 according to embodiments of the present disclosure. Asdepicted, the piezoelectric element 1962 may include two subpiezoelectric elements, each sub piezoelectric element may be a threeterminal piezoelectric element, the O electrodes of the two subpiezoelectric elements may be electrically coupled to each other, the Xelectrodes of the two sub piezoelectric elements may be electricallycoupled to each other, and the T electrodes of the two sub piezoelectricelements may be electrically coupled to each other. As such, thepiezoelectric element 1962 may be interconnected to the circuit element1966 by three bumps.

FIG. 20 shows a schematic diagram of an m×n array 2000 of piezoelectricelements 2002-11-2002-mn according to embodiments of the presentdisclosure. As depicted, each piezoelectric element may be a twoterminal piezoelectric element (such as piezoelectric element 900 inFIG. 9 ) and have an electrode (O) (e.g. 2003-11) electrically coupledto a conductor (O) (e.g. 2004-11) and an electrode (X) electricallyconnected to ground or a DC bias voltage via a common conductor (X)2006. In embodiments, each signal conductor (O) may be managedindependently by a circuit element (such as 1908). In embodiments, eachconductor (O) (e.g. 2004-mn) may be electrically coupled to a transmitdriver of a circuit element while all of the X electrodes(2006-11-2006-mn) of the piezoelectric element array may be connected toa common conductor (X) 2006. In embodiments, the array 2000 may bedisposed on a transceiver substrate and electrically coupled to an ASICchip by interconnection mechanism, such as m×n+1 bumps, as discussed inconjunction with FIGS. 19A-19G. More specifically, the m×n conductors(O) 2004-11-2004-mn may be coupled to m×n transmit drivers of ASIC chipby m×n bumps and the common conductor (X) 2006 may be coupled to theASIC chip by one bump. In embodiments, such an exemplary arrangement asdescribed here is used to perform 3D imaging, where each piezoelectricelement, including at least one sub piezoelectric element, can provideunique information in the array. In embodiments, each piezoelectricelement may have one or more membranes and vibrate in multiple modes andfrequencies of the membranes. In embodiments, each piezoelectric element2002 may be driven by pulses that have voltage profiles 3300 and 3400 inFIGS. 33 and 34 .

In embodiments, the O electrodes in each column (e.g. 2003-11-2003-m 1)may be electrically coupled to a common conductor. For instance, thecircuit elements in the ASIC chip may be electronically controlled sothat the O electrodes in each column may be electrically coupled to eachother. In such a configuration, the O electrodes in each column mayreceive the same electrical pulse through a common transmit driver orper a multiplicity of drivers with identical electrical drive signalsduring the transmit mode. Similarly, the O electrodes in each column maysimultaneously transmit the electrical charge to a common amplifierduring the receive mode. Stated differently, the piezoelectric elementin each column may be operated as a line unit (or equivalently lineelement).

FIG. 21 illustrates a schematic diagram of an n×n array 2100 ofpiezoelectric elements 2102-11-2012-mn according to embodiments of thepresent disclosure. As depicted, each piezoelectric element may be athree terminal piezoelectric element and include the electrodes O, X,and T. In embodiments, the X electrodes (e.g. X11, X21, . . . , Xml) maybe connected column wise in a serial manner and all of the X electrodes(X11-Xmn) may be electrically coupled to a common conductor (X) 2106.The T electrodes (e.g. T11, T21, . . . , Tm1) may be connected columnwise in a serial manner and all of the T electrodes (T11-Tmn) may beelectrically coupled to a common conductor (T) 2108. A column ofelements such as 2102-11, 2102-21 through 2102-m 1 when connectedtogether as described in embodiments make up a line element or a column.In embodiments, each of the O electrodes 2103-11-2103-mn may beelectrically coupled to a transmit driver of a corresponding circuitelement in an ASIC chip via one of the conductors O11-Omn. Inembodiments, the array 2100 may be disposed on a transceiver substrateand electrically coupled to an ASIC chip by interconnection mechanism,such as m×n+2 bumps.

In embodiments, the O electrodes in each column (e.g. 2103-11-2103-m 1)may be electrically coupled to a common conductor. In such aconfiguration, the O electrodes in each column may receive the sameelectrical pulse through a common transmit driver during the transmitmode. Similarly, the O electrodes in each column may simultaneouslytransmit the electrical charge to a common amplifier during the receivemode. Stated differently, the piezoelectric element in each column isoperated as a line unit. In embodiments each of the O electrodes in acolumn may be connected to a dedicated transmit driver, where the inputsignal of the transmit drivers for all elements in a column areidentical, thus creating a substantially identical transmit drive outputto appear on all piezoelectric elements during a transmit operation.Such a line element is electronically controlled on a per element basis,since each element has it own transmit driver. This has advantages indriving large capacitive line elements, where each element has smallercapacitance and delays in timing can be minimized for elements on acolumn. In embodiments, in a receive mode, charge from all elements in acolumn can be sensed by connecting it to a LNA, as is done by 2Dimaging. For 3D imaging, charge for each element is sensed by connectingthe O electrodes of each element to a LNA during a receive modeoperation.

FIG. 22 illustrates a schematic diagram of an m×n array 2200 ofpiezoelectric elements 2202-11-2202-mn according to embodiments of thepresent disclosure. As depicted, the array 2200 may be similar to thearray 2100, with the differences that the X electrodes (e.g. X12-Xm2) ina column may be connected to a common conductor (e.g. 2206-1) and the Telectrodes (e.g. T12-Tm2) in a column may be connected to a commonconductor (e.g. 2208-1). As such, the X electrodes (or T electrodes) inthe same column may have the same voltage potential during operation. Inembodiments, each of the O electrodes may be electrically coupled to atransmit driver of a corresponding circuit element in an ASIC chip viaone of the conductors O11-Omn. In embodiments, the array 2200 may bedisposed on a transceiver substrate and electrically coupled to an ASICchip by interconnection mechanism, such as m×n+2n bumps.

Compared to array 2100, the array 2200 may use more bumps for connectingthe T and X electrodes to the ASIC chip. In general, an increase in thenumber of connections for T and X between the ASIC chip and thepiezoelectric array may reduce impedance in the X and T conductors whenconnected in parallel to the ground or DC bias sources and reduce thecrosstalk. Crosstalk refers to the coupling of signals from an imagingelement to another one, and may create interference and reduce the imagequality. Spurious electrical coupling may be created when any voltagedrop due to current flowing in X and T lines appear across apiezoelectric element that ideally should not be exposed to thatvoltage. In embodiments, when the piezoelectric element is nottransmitting or receiving under electronic control, the X, T, and Oelectrodes may be locally shorted. Alternatively, the idle electrodeshave the O electrodes grounded, leaving the X electrodes connected toother X electrodes in the array and the T electrodes connected to otherT electrodes in the array.

FIG. 23 illustrates a schematic diagram of an m×n array 2300 ofpiezoelectric elements 2302-11-2302-mn according to embodiments of thepresent disclosure. As depicted, the array 2300 may be similar to thearray 2100, with the difference that each piezoelectric element may be afive terminal piezoelectric element, i.e., each piezoelectric elementmay include one bottom electrode (O) and four top electrodes (two Xelectrodes and two T electrodes). In embodiments, two X electrodes ofeach piezoelectric element may be connected column wise in a serialmanner and all of the 2m×n X electrodes may be electrically coupled to acommon conductor (X) 2306. Similarly, the two T electrodes of eachpiezoelectric element may be connected column wise in a serial mannerand all of the 2m×n T electrodes may be electrically coupled to a commonconductor (T) 2308. In embodiments, each of the O electrodes may beelectrically coupled to a transmit driver of a corresponding circuitelement in an ASIC chip via one of the conductors O11-Omn. Inembodiments, the array 2300 may be disposed on a transceiver substrateand electrically coupled to an ASIC chip by interconnection mechanism,such as m×n+2 bumps.

FIG. 24 illustrates a schematic of an m×n array 2400 of piezoelectricelements 2402-11-2402-mn according to embodiments of the presentdisclosure. As depicted, the array 2400 may be similar to the array2200, with the differences that each piezoelectric element may be a fiveterminal piezoelectric element: one bottom electrode (O) and four topelectrodes (two X electrodes and two T electrodes). In embodiments, thetwo X electrodes of each piezoelectric element may be electricallyconnected in a column wise direction to a conductor (e.g. 2406-1), andthe two T electrodes of each piezoelectric element may be electricallyconnected in a column wise direction to a common conductor (e.g.2408-1). In embodiments, each of the O electrodes may be electricallycoupled to a transmit driver of a corresponding circuit element in anASIC chip via one of the conductors O11-Omn. In embodiments, the array2400 may be disposed on a transceiver substrate and electrically coupledto an ASIC chip by interconnection mechanism, such as m×n+2n bumps.

FIG. 25 illustrates a schematic diagram of an m×n array 2500 ofpiezoelectric elements 2502-11-2502-mn according to embodiments of thepresent disclosure. As depicted, the array 2500 may be similar to thearray 2100 in that each piezoelectric element may have one bottomelectrode (O) and two top electrodes (T), but have the differences thatall of the two top electrodes (T) of the piezoelectric elements along acolumn (e.g. 2502-11-2502-m 1) may be electrically connected to a commonconductor (e.g. 2508-1). In embodiments, each of the O electrodes may beelectrically coupled to a transmit driver of a corresponding circuitelement in an ASIC chip via one of the conductors O11-Omn. Inembodiments, the array 2500 may be disposed on a transceiver substrateand electrically coupled to an ASIC chip by interconnection mechanism,such as m×n+n bumps.

FIG. 26 illustrates a schematic of an m×n array 2600 of piezoelectricelements 2602-11-2602-mn according to embodiments of the presentdisclosure. As depicted, the array 2600 may have similar electricalconnections to the array 2100, i.e., all of the X electrodes in thepiezoelectric elements may be electrically coupled to a common conductor2606 and all of the T electrodes in the piezoelectric elements may beelectrically coupled to a common conductor 2608. The array 2600 may bedifferent from the array 2100 in that the top electrodes (X, T) of onepiezoelectric element (e.g. 2602-11) may have the same or differentgeometrical shapes from the top electrodes (X, T) of anotherpiezoelectric element (e.g. 2602-21).

For the piezoelectric arrays 2000-2500, the piezoelectric elements ineach piezoelectric array may be the same or different from each other.For instance, the projection areas of the two top electrodes of onepiezoelectric element 2202-11 may have same or different shapes from theprojection areas of the two top electrodes of another piezoelectricelement 2202-n 1.

FIG. 27 illustrates a schematic diagram of an m×n array 2700 ofpiezoelectric elements 2702-11-2702-mn according to embodiments of thepresent disclosure. As depicted, each piezoelectric element may includetwo signal electrodes (O) and one common electrode (X). In embodiments,each signal electrode (O) may be electrically coupled to a transmitdriver of a corresponding circuit element of an ASIC chip. For instance,the piezoelectric element 2702-11 may include two signal conductors O111and 0112 that may be electrically coupled to two circuit elements in anASIC chip, respectively, where each signal electrode may developelectrical charge during the receive mode. In embodiments, the array2700 may be disposed on a transceiver substrate and electrically coupledto an ASIC chip by interconnection mechanism, such as 2m×n+1 bumps. Inembodiments, all of the T electrodes in the array 2700 may beelectrically coupled to the ground or a DC bias voltage via the commonconductor (T) 2708.

In embodiments, the signal conductors (O) in the arrays in FIGS. 20-27may be electrically coupled to a circuit element, where the circuitelement may include a transistor switch that is similar to the switch1816 in FIG. 18A, i.e., the switch may toggle between the transmitdriver and an amplifier during the transmit and receive modes,respectively so that the O electrode may generate pressure wave duringthe transmit mode and develop electrical charge during the receive mode.

FIG. 28 shows an exemplary embodiment of an imaging system 2800according to embodiments of the present disclosure. As depicted, theimaging system 2800 may include an array of piezoelectric elements2802-11-2802-mn and circuit elements for controlling/communicating withthe array. In embodiments, each of the piezoelectric elements2802-11-2802-mn may include three electrodes; first and second signal(O) electrodes and a T electrode. (For the purpose of illustration, thefirst and second O electrodes in each piezoelectric element refer to theleft and right O electrodes of each piezoelectric element in FIG. 28 .)In embodiments, all of T electrodes in the array 2800 may beelectrically coupled to the ground or DC bias voltage via the conductor(T) 2808. In embodiments, the first O electrodes of the piezoelectricelements in a column may be electrically coupled to a common conductor(e.g. O11) and the second O electrodes of the piezoelectric elements inthe same column may be electrically coupled to another common conductor(e.g. O12). In embodiments, during the receive mode, each of the firstand second signal O electrodes may develop electrical charge that may beprocessed by a corresponding circuit.

In embodiments, the first set of conductors O11, O21, . . . , On1 may beelectrically coupled to the amplifiers 2810-1-2810-n, respectively,where the electrical charge developed in a column of the first Oelectrodes may be transferred to a corresponding amplifier via one ofthe O conductors. In embodiments, the second set of conductors O12, O22,. . . , On2 may be electrically coupled to the switches 2812-1-2812-n,respectively. In embodiments, each switch (e.g. 2812-1) may be connectedto a transit driver (e.g. 2816-1) during the transmit mode/process sothat a signal pulse may be transmitted to a column of second Oelectrodes in the piezoelectric elements (e.g. 2801-11-2802-m 1). Inembodiments, each switch (e.g. 2812-1) may be connected to a signalamplifier (e.g. 2814-1) during the receive mode/process so thatelectrical charge developed in a column of second O electrodes in thepiezoelectric elements (e.g. 2801-11-2802-m 1) may be transmitted to theamplifier. In embodiments, the piezoelectric elements 2802-11-2802-mnmay be disposed in a transceiver substrate while the switches2812-1-2812-n, transmit drivers 2816-1-2816-n, and amplifies2810-1-2810-n and 2814-1-2814-n may be disposed in an ASIC chip, wherethe transceiver substrate may be electrically coupled to the ASIC chipby 2n+1 bumps.

In embodiments, a column of the first electrodes may be electricallycoupled to a common conductor (e.g. O11) and a column of the secondelectrodes may be electrically coupled to another common conductor (e.g.O12). As such, in embodiments, the imaging system 2800 may be operatedas a line imager, i.e., each of the first set of conductors O11-On2 mayoperate as a transmit unit and/or a receive unit during operation. Asdiscussed above, during the receive mode, the electrical chargedeveloped in a column of the first O electrodes connected to a conductor(e.g. O11) may be transmitted to an amplifier (e.g. 2810-1), which maybe a low noise amplifier. Then, the amplifier may amplify the electricalcharge signal and convert the charge signal to an output voltage. Thus,each column of the first O electrodes may operate as a receiving lineimager. In embodiments, during the receive mode, the electrical chargedeveloped in a column of the second O electrodes connected to aconductor (e.g. O12) may be transmitted to a signal amplifier (e.g.2814-1), which may be a low noise amplifier, via a switch (e.g. 2812-1).Then, the amplifier may amplify the electrical charge signal and convertthe charge signal to an output voltage. Thus, each column of the secondO electrodes may operate as a receiving line imager. In embodiments,during the transmit mode, the electrical signal pulse may be transmittedfrom the transmit driver (e.g. 2816-1) to a column of the second Oelectrodes connected to a conductor (e.g. O12) via a switch (e.g.2812-1) so that the set of second O electrodes may generate pressurewaves. Thus, each column of second O electrodes may operate as atransmit line unit.

In embodiments, the switches 2812, which may be transistor switches, maybe set to a neutral position (i.e., they are not coupled to eithertransmit drivers or amplifiers) during the receive mode. In such a case,only the second set of conductors O12, O22, . . . , On2 may operateduring the receive mode.

In embodiments, the transmit driver (e.g. 2816-1) may send a signal to acolumn of piezoelectric elements (e.g. 2802-11-2802-m 1) via a conductor(O12) and simultaneously, an amplifier (e.g. 2810-1) may receiveelectrical charge signal from the same column of piezoelectric elements(e.g. 2802-11-2802-m 1). In such a case, each piezoelectric element(e.g. 2802-11) in a column may receive a signal from the transmit driver(e.g. 2816-1) through one conductor (e.g. O12) and simultaneouslytransmit an electrical charge signal to an amplifier (e.g. 2810-1) viaanother conductor (e.g. O11), i.e., the imaging system 2800 may performsimultaneous transmitting and receiving modes. This simultaneousoperation of transmitting and receiving modes may be very advantageousin continuous mode Doppler Imaging, where a high blood flow velocity maybe imaged, compared to pulsed Doppler Imaging.

In embodiments, a line unit, which refers to a column of O electrodeselectrically coupled to a common conductor, may operate as a transmitunit or a receive unit or both. For instance, electrical signals may besequentially transmitted to the conductors O12, O22, . . . , On2 so thatthe line elements sequentially generate pressure waves during thetransmit mode, and the reflected pressure waves may be processed andcombined to generate a two dimensional image of the target organ in thereceive mode. In another example, electrical drive signals may besimultaneously transmitted to the conductors O12, O22, . . . , On2during the transmit mode and the reflected pressure waves may beprocessed at the same time using charge generated from conductors O11,O12 to On1 to simultaneously transmit and receive ultrasound to create atwo dimensional image. Conductors O12-On2 may also be used to receivecharge from the piezoelectric line elements in a receive mode ofoperation.

FIG. 29 shows an exemplary embodiment of an imaging system 2900according to embodiments of the present disclosure. As depicted, theimaging system 2900 includes an array of piezoelectric elements2902-11-2902-mn and each piezoelectric element may include first andsecond signal (O) electrodes and a T electrode. In embodiments, all ofthe T electrodes in the array may be electrically coupled to one commonconductor (T) 2908; each row of the first O electrodes may beelectrically connected to one of conductors O1-Om; and each column ofthe second O conductors may be electrically connected to a switch 2912via one of conductors O12-On2 and. In embodiments, each of the switches2912-1-2912-n may toggle between a transmit driver (e.g. 2916-1) and anamplifier (e.g. 2914-1), which may be a low noise amplifier. Inembodiments, each of the conductors O1-On may be connected to one of theamplifiers 2910-1-2910-m, which may be low noise amplifiers.

In embodiments, during the transmit mode, a signal may be transmittedfrom a transmit driver (e.g. 2916-1) to a column of second O electrodesvia a conductor (e.g. O12) so that the column of piezoelectric elementsmay generate pressure waves as a line unit. During the transmit mode,each switch (e.g. 2912-1) may be toggled to a corresponding transmitdriver (e.g. 2916-1).

In embodiments, the imaging system 2900 may process the reflectedpressure waves in two different methods. In the first method, theamplifiers 2910-1-2910-n may receive electric charge signals from thefirst O electrodes, i.e., each amplifier may receive signals from a rowof the first O electrodes. This method allows biplane imaging/mode,where for a two dimensional image, the biplane image may provideorthogonal perspectives. Also, this method may provide more than twodimensional imaging capability. The biplane imaging may be helpful formany applications, such as biopsy. It is noted that, in this method, thetransmitting and receiving modes may be performed simultaneously. In thesecond method, the switches 2912 may be toggled to the amplifiers 2914so that each amplifier may receive and process the electrical chargesignals from a corresponding column of the second O electrodes.

In embodiments, a line unit, which refers to a column (or row) of Oelectrode electrically coupled to an O conductor, may operate as atransmit unit or a receive unit or both. In embodiments, even though theconductors O1-Om are arranged in orthogonal directions to the conductorsO12-On2, the directions may be electronically programmed andelectronically adjustable. For instance, the gain of the amplifiers 2910and 2914 may be adjustable electronically, where gain control leads areimplemented in the amplifiers. In embodiments, the length of each lineelements (i.e., the number of piezoelectric elements in each lineelement) may also be electronically adjusted. In embodiments, this maybe achieved by connecting all signal electrodes of every piezoelectricelement to corresponding nodes in the ASIC chip and, where the ASICprograms the connection between the signal electrodes of the elements tobe connected to each other, transmit drivers or amplifiers asappropriate.

FIG. 30 shows an embodiment of a piezoelectric element 3000 coupled to acircuit element 3001 according to embodiments of the present disclosure.As depicted, the piezoelectric element 3000 may include: a firstsub-piezoelectric element 3021-1 and a second sub-piezoelectric element3021-2. The piezoelectric element 3000 may include: a bottom electrode(X) 3002 that is shared by the first and second sub piezoelectricelements and coupled to a conductor (X) 3006. In embodiments, the firstsub-piezoelectric element 3021-1 may include a signal (O) electrode 3003that is electrically coupled to the amplifier 3010 via the conductor3008. In embodiments, the second sub-piezoelectric element 3021-2 mayinclude a signal (O) electrode 3004 that is electrically coupled to theswitch 3014 via the conductor 3012.

In embodiments, a circuit element 3001 may be electrically coupled tothe piezoelectric element 3000 and include two amplifiers 3010 and 3016,such as low noise amplifiers, and a transmit driver 3018. Inembodiments, the switch 3014 may have one end connected to the Oelectrode 3004 through the conductor 3012 and the other end that maytoggle between the amplifier 3016 for the receive mode and a transmitdriver 3018 for the transmit mode. In embodiments, the amplifier 3016may be connected to other electronics to further amplify, filter anddigitize a receive signal, even though an amplifier is used tosymbolically represent the electronics. The transmit driver 3018 may bea multistage drive and may generate an output with two or more levels ofa signaling. The signaling can be unipolar or bipolar. In embodiments,the transmit driver 3018 may include a switch interconnecting an inputto an output of a driver under electronic control of the driver, whichis not explicitly shown In FIG. 30 .

In embodiments, the signal of the transmit driver 3018 may be pulsewidth modulated (PWM), where, by controlling the pulse widths on a perelement basis, a weighting function may be created on a transmittedultrasound signal. This may for example perform a windowing function,where the transmit signal is weighted by a window function. Inembodiments, the weighting coefficients may be achieved by varying theduty cycle of the transmit signal as is done during PWM signaling. Thiskind of operations may allow for transmit apodization, where the sidelobe of a radiated signal are greatly attenuated, allowing for a higherquality image.

In embodiments, a transceiver array may be disposed in a transceiversubstrate and include an n×n array of the piezoelectric element 3000 andan n×n array of the circuit elements 3001 may be disposed in an ASICchip, where each piezoelectric element 3000 may be electrically coupledto a corresponding one of the n×n array of the circuit elements 3001. Insuch a case, the transceiver substrate may be interconnected to the ASICchip by 3n² bumps. In embodiments, each column (or row) of piezoelectricelement array may be operated a line unit, as discussed in conjunctionwith FIGS. 28 and 29 . For instance, a same pulse may be simultaneouslyapplied to a column of piezoelectric elements so that the column ofpiezoelectric elements may generate pressure waves simultaneously. It isnoted that each piezoelectric element 3000 of the n×n array ofpiezoelectric elements may be coupled with a corresponding one circuitelement 3001 of the n×n array of circuit elements.

In embodiments, the sub-piezoelectric element 3021-1 may be in thereceive mode during the entire operational period while thesub-piezoelectric element 3021-2 may be in either transmit or receivemode. In embodiments, the simultaneous operation of transmit and receivemodes may allow the continuous mode Doppler imaging.

In embodiments, when the transmit driver 3018 transmits a signal to theelectrode 3004, the power levels of the pressure wave generated by thesub-piezoelectric element 3021-2 may be changed by using pulse widthmodulation (PWM) signaling. This is important, for example, whenswitching from B mode to Doppler Mode imaging, signal power transmittedinto the human body may be long and if power levels are not reduced,tissue damage may occur. Typically, in the conventional systems,different fast settling power supplies are used for B Mode and variousDoppler Mode imaging to allow transmit drive voltages to differ in the 2cases to for example not create excessive power in Doppler mode. Unlikethe conventional systems, in embodiments, the power level may be changedby using the PWM signals on the transmit without using the conventionalfast settling power supplies. In embodiments, rapid switching betweenDoppler and B mode imaging is desired to co-image these modes together.In embodiments, the ground electrodes of the piezoelectric element mayalso be separated from each other and connected to the groundseparately. In embodiments, this independent grounding may reduce thenoise and result in faster settling times. In embodiments, powertransmitted may also be reduced by reducing the height of the transmitcolumns under electronic control. This again facilitates use of samepower supply for both Doppler and B mode and meet power transmissionrequirements in each mode. This also allows co imaging.

FIG. 31 shows a circuit 3100 for controlling multiple piezoelectricelements according to embodiments of the present disclosure. Inembodiments, the circuit 3100 may be disposed in an ASIC chip, where theline (either column or row) of piezoelectric elements that is disposedin a transceiver substrate and the ASIC chip may be interconnected tothe transceiver substrate by bumps. As depicted, the circuit 3100 mayinclude an array of circuit elements 3140-1-3140-n, where each circuitelement may communicate signals with the O and X electrodes of thecorresponding piezoelectric element.

As depicted in FIG. 31 , each circuit element (e.g. 3140-1) may includea first switch (e.g. 3102-1), a second switch (e.g. 3104-1), a thirdswitch (e.g. 3106-1), and a transmit driver (e.g. 3108-1). The outputfrom the transmit driver (e.g. 3108-1) may be sent to an O electrode ofthe piezoelectric element via a conductor (e.g. 3110-1). During thetransmit mode, each circuit element may receive a transmit driver(driving) signal 3124 through a conductor 3122. Each second switch (e.g.3104-1), which may be transistor switches and controlled by a controlunit 3150, may be turned on to transmit the signal 3124 to the transmitdriver (e.g. 3108-1). (The electrical connections between the controlunit 3150 and other components in the circuit 3100 are not shown in FIG.31 .) The transmit driver (e.g. 3108-1) may perform logical decode,level shift, buffer the input signal and send the transit signal to theO electrode via the conductor (e.g. 3110-1). In embodiments, during thetransmit mode, the first switch (e.g. 3102-1) may be turned off.

In embodiments, the control unit 3150 may decide which piezoelectricelements need to be turned on during the transmit mode. If the controlunit 3150 decides not to turn on a second piezoelectric element, thefirst switch (e.g. 3102-2) and the second switch (e.g. 3104-2) may beturned off, while the third switch (e.g. 3106-2) may be turned on sothat the O and X electrodes have the same electrical potential (i.e.,there is a net zero volt drive across the piezoelectric layer). In inembodiments, the third switches 3106 may be optional.

In embodiments, during the receive mode, the first switch (e.g. 3102-1)may be turned on so that the electrical charge developed in the Oelectrode may be transmitted through the conductors 3110-1 and 3120 tothe amplifier 3128. Then, the amplifier 3128 may receive electricalcharge signal (or, equivalently, sensor signal) 3126 and amplify thesensor signal, where the amplified signal may be further processed togenerate an image. During the receive mode, the second switch (e.g.3104-1) and the third switch (e.g. 3106-1) may be turned off so that thereceived signal may not be interfered. It is noted that the entire arrayof the circuit element 3140-1-3140-n may share a common amplifier 3128,simplifying the design of the circuit 3100. In embodiments, the Xelectrodes of the piezoelectric elements may be electrically coupled tothe ground or a DC bias voltage via the conductors 3112-1-3112-n, wherethe conductors 3112-1-3112-n may be electrically coupled to a commonconductor 3152.

In embodiments, the circuit 3100 may be coupled to a column ofpiezoelectric elements (e.g. 2002-11-2002-n 1) in FIG. 20 . Inembodiments, a plurality of circuits that are similar to the circuit3100 may be coupled with the multiple columns of piezoelectric elementsin the array in FIG. 20 , and the conductors 3152 may be coupled to acommon conductor (such as 2006 in FIG. 20 ). In embodiments, the circuit3100 may control a column of piezoelectric elements in FIGS. 20-27 .

FIG. 32 shows a circuit 3200 for controlling multiple piezoelectricelements according to embodiments of the present disclosure. Inembodiments, the circuit 3200 may be disposed in an ASIC chip, where theline (either column or row) of piezoelectric elements that is disposedin a transceiver substrate and the ASIC chip may be interconnected tothe transceiver substrate by bumps. As depicted, the circuit 3200 mayinclude an array of circuit elements 3240-1-3240-n, where each circuitelement may communicate signals with the O, X, and T electrodes of thecorresponding piezoelectric element.

As depicted in FIG. 32 , each circuit element (e.g. 3240-1) may includea first switch (e.g. 3202-1), a second switch (e.g. 3204-1), a thirdswitch (e.g. 3206-1), a fourth switch (e.g. 3207-1), and a transmitdriver (e.g. 3208-1). The output from the transmit driver (e.g. 3208-1)may be sent to an O electrode of the piezoelectric element via aconductor (e.g. 3210-1). During the transmit mode, each circuit elementmay receive a transmit driver (or driving) signal 3224 through aconductor 3222. Each second switch (e.g. 3204-1), which may be atransistor switch and controlled by a control unit 3250, may be turnedon to transmit the signal 3224 to the transmit driver (e.g. 3208-1).(The electrical connection between the control unit 3250 and othercomponents in the circuit 3200 are not shown in FIG. 32 .) The transmitdriver (e.g. 3208-1) may logically decode the signal, level shift it andbuffer, the output signal and send the transmit output signal to the Oelectrode via the conductor (e.g. 3210-1). In embodiments, during thetransmit mode, the first switch (e.g. 3202-1) may be turned off.

In embodiments, the control unit 3250 may decide which piezoelectricelements need to be turned on during the transmit mode. If the controlunit 3250 decides not to turn on a second piezoelectric element, thefirst switch (e.g. 3202-2) and the second switch (e.g. 3204-2) may beturned off, while the third switch (e.g. 3206-2) and the fourth switch(e.g. 3207-2) may be turned on so that the O and X (and T) electrodeshave the same electrical potential (i.e., there is a net zero volt driveacross the piezoelectric layer). In in embodiments, the third and fourthswitches (e.g. 3206-2 and 3207-2 may be optional. It is understood that3 level signaling and a transmit driver that performs that is not shownexplicitly. Similarly the connections to X T conductors and switcheslike 3206-2, 3207-2 are shown in a simplified manner.

In embodiments, during the receive mode, the first switch (e.g. 3202-1)may be turned on so that the electrical charge developed in the Oelectrode may be transmitted through the conductors 3210-1 and 3220 tothe amplifier 3228. Then, the amplifier 3228 may amplify the electricalcharge (or sensor) signal 3226, where the amplified signal may befurther processed to generate an image. During the receive mode, thesecond switch (e.g. 3204-1), the third switch (e.g. 3206-1), and thefourth switch (e.g. 3207-1) may be turned off so that the receivedsignal may not be interfered.

It is noted that the entire array of the circuit element 3240-1-3240-nmay share a common amplifier 3228, simplifying the design of the circuit3200. In embodiments, the X electrodes of the piezoelectric elements maybe electrically coupled to the ground or a DC bias voltage via theconductors 3212-1-3212-n, where the conductors 3212-1-3212-n may beelectrically coupled to a common conductor 3252. In embodiments, the Telectrodes of the piezoelectric elements may be electrically coupled tothe ground or a DC bias voltage via the conductors 3213-1-3213-n, wherethe conductors 3213-1-3213-n may be electrically coupled to a commonconductor 3254.

In embodiments, the circuit 3200 may be coupled to a column ofpiezoelectric elements (e.g. 2102-11-2102-n 1) in FIG. 21 . Inembodiments, a plurality of circuits that are similar to the circuit3200 may be coupled with the multiple columns of piezoelectric elementsin the array in FIG. 21 , and the conductors 3252 may be coupled to acommon conductor (such as 2106 in FIG. 20 ). Similarly, in embodiments,the conductors 3254 may be coupled to a common conductor (such as 2108in FIG. 21 ). In embodiments, the circuit 3200 may control a column ofpiezoelectric elements in FIGS. 20-27 .

In FIGS. 22-32 , conductors are used to electrically couple an electrodeto another electrode. For instance, the electrodes 2006-11-2006-m 1 areelectrically coupled to a conductor 2006. In embodiments, the conductorsin FIGS. 22-32 may be implemented in a variety of methods, such as metalinterconnect layers deposited and patterned on the substrate on whichthe piezoelectric elements are disposed or on a different substrate,such as ASIC, that is connected to the substrate.

FIGS. 33 and 34 show exemplary waveforms 3300 and 3400 for driving apiezoelectric element during the transmit mode according to embodimentsof the present disclosure. In general, piezoelectric material may bevulnerable to damages caused by dielectric aging, and the aging may bedelayed or avoided by using unipolar drive signals. The waveforms 3300and 3400 represent the voltage potential between O and X electrodesand/or between O and T electrodes. As depicted, the waveforms may beunipolar in nature and may be a two level step waveform 3300 (i.e., thetransmit driver, such as 2812, 2912, 3018, 3108, 3208, etc. is aunipolar transmit driver) or a multilevel (such as three level) stepwaveform 3400. The actual voltage amplitude may vary typically from 1.8V to 12.6 V. In embodiments, the multistep waveform 3400 or a waveformwith more steps may reduce heating in the piezoelectric element and haveadvantages for use during certain imaging modes, such as Doppler orharmonic imaging.

In embodiments, the frequency of the pulses in the waveforms 3300 and3400 may vary depending on the nature of the signal needed and need tocontain the frequency at which membrane underlying the pMUT isresponsive to. In embodiments, the waveforms may also be complexsignals, such as linear or non-linear frequency modulated chirp signals,or other coded signals using the Golay codes.

In embodiments, the circuits for driving the piezoelectric elements mayfurther be designed such that the transmit output from the underlyingmembrane may be symmetrical in shape. In embodiments, for each signalpulse in the waveform 3300 (or 3400), the rising edge of the pulse maybe substantially symmetrical to the falling edge of the pulse withrespect to the center of the pulse. This symmetry lowers the harmoniccontent of the transmit signal, specially the second harmonic and othereven order harmonics signal. In embodiments, the signal pulse in thewaveform 3300 (or 3400) may be a pulse width modulated (PWM) signal.

FIG. 35 shows a transmit drive signal waveform according to embodimentsof the present disclosure. As depicted, the signal 3500 from thetransmit driver may be symmetric and bipolar i.e., the magnitude (H1)and width (W1) of the peak maximum voltage are the same as the magnitude(H2) and width (W2) of the peak minimum voltage. Also, the slope of therising edge 3502 is the same as the slope of the falling edge 3504. Inaddition, the rising time W3 is the same as the fall time W4, where thefall time W4 refers to the time interval between the starting point ofthe fall and the reference voltage. Furthermore, the rising edge 3506has the same slope as the rising edge 3502.

During the transmit operation, the transmit drive, e.g. 3018 in FIG. 30, may be driven by an electrical waveform, such as shown in FIGS. 33-34. FIG. 36 shows output signals of various circuits in an imagingassembly according to embodiments of the present disclosure. Inembodiments, the waveform 3602 may be an output signal from the transmitdriver, e.g. 3018 and transmitted to a piezoelectric element, e.g. 3000.In embodiments, as the piezoelectric element may have an inherentbandwidth, it may output a sinusoidal output 3604 at its resonantfrequency. If the output of the transmit driver connected to the Oelectrode of the piezoelectric element rises very slowly, it may not beable to charge the electrode to the desired final value and thus maycause low output signals, as shown in waveform 3606, where finalamplitude is smaller than in 3602. On the other hand, if the outputsignal of the transmit driver settles very quickly, the output signal ofthe transmit driver has larger bandwidth than the bandwidth limit of thepiezoelectric element and therefore extra energy may be dissipated inheat. Therefore, in embodiments, as shown in the waveform 3608, thepiezoelectric element may be charged at a rate such that it iscompletely charged but not very quickly. In embodiments, the waveform3608, which represents the voltage potential across the top and bottomelectrodes as a function of time, is closer in shape to the output ofthe transducer and because difference in shape is smaller, the inputsignal bandwidth and output signal bandwidth matches better, less lossof energy in heat occurs. In embodiments, drive impedance of transmitdriver is optimized to reduce the loss of energy. Stated differently,the impedance of the transmit driver is designed to drive thepiezoelectric element optimally with respect to heat dissipation andtime constants needed for adequate voltage settling within a target timeperiod.

In embodiments, the imager 120 may use a harmonic imaging technique,where the harmonic imaging refers to transmitting pressure waves on thefundamental frequency of the membrane and receiving reflected pressurewaves at second or higher harmonic frequencies of the membrane. Ingeneral, the images based on the reflected waves at the second or higherharmonic frequencies have higher quality than the images based on thereflected waves at the fundamental frequency. The symmetry in thetransmit waveform may suppress the second or higher harmonic componentsof the transmit waves, and as such, the interference of these componentswith the second or higher harmonic waves in the reflected waves may bereduced, enhancing the image quality of the harmonic imaging technique.In embodiments, to reduce the second or higher harmonic waves in thetransmit waves, the waveform 3300 may have 50% duty cycle.

In FIGS. 20-29 , the arrays may include multiple line units, where eachline unit includes a plurality of piezoelectric elements that areelectrically coupled to each other. In embodiments, the line units maybe driven with multiple pulses that have phase differences (orequivalently delays). By adjusting the phases, the resultant pressurewaves may be steered at an angle, which is referred to as beamforming.

FIG. 37A shows a plot of the amplitude of a transmit pressure wave as afunction of spatial location along the azimuth axis of the transduceraccording to embodiments of the present disclosure. If the piezoelectricelements in the array are arranged in 2 dimensions and the piezoelectricelements on a column in the Y direction are connected and have manycolumns along the X direction, the X direction is known as the azimuthdirection and the Y direction is known as the elevation direction. Asdepicted in FIG. 37A, the transmit pressure wave includes the main lobeand multiple side lobes. The main lobe may be used to scan tissuetargets and have high pressure amplitude. The side lobes have loweramplitude but degrade quality of images and therefore it is desirable toreduce their amplitude.

FIG. 37B shows various types of windows for apodization processaccording to embodiments of the present disclosure. In FIG. 37B, x-axisrepresents position of a piezoelectric elements relative to thepiezoelectric element at the center of an active window and y-axisrepresents the amplitude (or, weight applied to the piezoelectricelement). As depicted, for the rectangular window 3720, there is noweighting provided for any of the transmit lines, i.e., they are all ata uniform amplitude (i.e. symbolically 1). On the other hand, if theweighting function is implemented, as depicted by the Hamming window3722, lines at the center get a greater weighting than ones at theedges. For instance, to apply the Hamming window 3722 to the transducertile 210 in FIG. 3B, the piezoelectric elements in the leftmost column(which is denoted as −N in FIG. 37B) and the piezoelectric elements inthe rightmost column (which is denoted as N in FIG. 37B) may have thelowest weight, while the piezoelectric elements in the middle column mayhave the highest weight. This process is known as apodization. Inembodiments, various types of window weighting may be applied, eventhough the Hamming window 3722 shown is only meant to be one example. Inembodiments, apodization may be implemented by a variety of means suchas scaling the transmit driver output drive level differently fordifferent lines by employing a digital to analog converter (DAC) or bykeeping the same drive level but reducing the number of pixels on a lineThe net effect is the side lobe level can be reduced by use ofapodization, where the weighting of the transmit drive varies based onwhere a particular line is located within the transmit apertureenergized.

In embodiments, the reduction in the voltage of the pulses or waveformsmay lower the temperature at the transducer surface. Alternately, for agiven maximum acceptable transducer surface temperature, transducersoperating at lower voltages may deliver better probe performance,resulting in better quality images. For example, for a probe with 192piezoelectric elements to reduce power consumption, transmit pressurewaves may be generated by using only a portion of probe (i.e., a subsetof the piezoelectric elements) and scanning the remaining elementssequentially in time using a multiplexer. Therefore, at any point oftime, in the conventional systems, only a portion of the transducerelements may be used to limit the temperature rise. In contrast, inembodiments, the lower voltage probe may allow more piezoelectricelements to be addressed simultaneously, which may enable increasedframe rates of the images and enhanced image quality. Significant poweris also consumed in the receive path where the received signal isamplified using LNAs. An imaging system typically uses a number ofreceive channels, with an amplifier per receiver channel. Inembodiments, using temperature data, a number of receiver channels canbe turned off to save power and reduce temperature.

In embodiments, the apodization may be achieved by varying the number ofpiezoelectric elements in each line unit according to a window function.In embodiments, such a window approximation may be achieved byelectronically controlling the number of piezoelectric elements on aline or by hardwiring the transducer array with the required number ofelements.

In general, the heat developed by a probe may be a function of the pulseduration in the transmit pulse/waveform. In general, to make thepressure waves penetrate deep in the target with better signal to noiseratio (SNR), a piezoelectric element may requires long pulse trains.However, this also degrades axial resolution and also generates moreheat in the piezoelectric elements. So, in the conventional systems, thenumber of pulses emitted is small, sometimes one or two. Since longerpulses may create more heat energy, making it impractical for their usein the conventional systems. In contrast, in embodiments, the pulses andwaveforms 3300 and 3400 may have significantly lower peak values, whichmay enables the use of long pulse trains, chirps or other codedsignaling. In embodiments, the longer pulse trains do not degrade axialresolution since in the receiver matched filtering is performed tocompress the waveform to restore resolution. This technique allows abetter signal to noise ratio and allows signal to penetrate deeper intothe body and allows for high quality imaging of targets deeper in thebody.

In embodiments, a layer of Polydimethylsiloxane (PDMS) or otherimpedance matching material may be spun over the transducer elements inFIGS. 4-19 . This layer may improve the impedance matching between thetransducer elements and the human body so that the reflection or loss ofpressure waves at the interface between the transducer elements and thehuman body may be reduced.

In FIGS. 20-29 , more than one line unit may be created by connectingpixels in the y-direction (or x-direction), where one line unit (orequivalently line element) refers to multiple piezoelectric elementsthat are electrically connected to each other. In embodiments, one ormore line units may also be created by connecting piezoelectric elementsalong the x-direction. In embodiments, the piezoelectric elements in aline unit may be hardwired.

As discussed in conjunction with FIG. 18A, each piezoelectric element1806 may be electrically coupled to a circuit 1842, i.e., the number ofpiezoelectric elements in the transceiver substrate 1802 is the same asthe number of circuit 1842 in the ASIC chip 1804. In such a case, theelectrical connections of piezoelectric elements in each column (or row)may be performed electronically, i.e., the hardwire conductors (e.g.2006) for connecting electrodes in a column (or row) is replaced byelectronic switches. Stated differently, the piezoelectric elements in aline imager/unit may be electronically connected to each other. For anelectronically controlled line imager, a line imager/unit may be builtby connecting each piezoelectric element of a two dimensional matrixarray to a corresponding control circuit (such as 1842) of a twodimensional array of control circuits, where the control circuits arelocated spatially close to pixels. To create a line element, amultiplicity of drivers controlling a column (or row) of pixels may beturned on electronically. In embodiments, the number of drivers in eachline imager/unit can be electrically modified under program control andelectronically adjustable, i.e., the line imager having thepiezoelectric elements are electrically configurable.

In embodiments, smaller capacitance of each pixel may be drivenefficiently by the distributed drive circuitry without other equalizingelements in between driver and pixel, eliminating the difficulty ofdriving a very large line capacitance. In embodiments, driveroptimization may allow symmetry in rising edge and falling edges,allowing better linearity in transmit output, enabling harmonic imaging.(The symmetry is described in conjunction with FIGS. 33 and 34 .) Inembodiments, electronic control may allow programmable aperture size,transmit apodization, and horizontal or vertical steering control, allof which may improve image quality. In embodiments, the configurableline imager/unit under electronic control may be electrically modifiedunder program control. For example, if a smaller number of connectedelements is desired in the y-direction, the number may be adjusted bysoftware control and without having to re-spin the control electroniccircuitry or the piezoelectric array.

In embodiments, each line unit may be designed to consist of several subunits with separate control for each sub unit. The advantage of thesesub units is that it may alleviate the difficulty of driving a largecapacitive load for a line unit using one single external transmitdriver. For example, if two line units are created in the place of oneline unit that includes the entire piezoelectric elements in a column,two different transmit drivers (such as 2816) may be employed and eachtransmit driver may control half of the load of the full line unit.Also, even if one driver is used, driving the first half of the lineunit and the second half of the line unit separately may improve thedrive situation due to lower resistance connection to both ends of theline unit.

In embodiments, both the length and orientation of the line units may becontrolled. For instance, in FIGS. 20-29 , the line units may bearranged in both x and y directions. By way of example, in FIG. 30 , theO electrodes along a column (e.g. 2003-11-2003-n 1) may be electricallycoupled to form one line unit, and the O electrodes in the other columnsmay be electrically coupled to form n number of line units that extendalong the x-direction. More specifically, the line units that extendalong the x-direction include n number of O electrodes (2003-12-2003-1n), . . . , (2003-n 2-2003-nn). In embodiments, the arrangement of lineunits along orthogonal directions may be possible by controlling theelectrical circuits in ASIC chip.

In FIGS. 20-30 , each piezoelectric element may include two or more top(X and T) electrodes. In embodiments, the piezoelectric layer underthese top electrode may be poled in the same direction or oppositedirections. The multiple poling direction when combined with anappropriate applied signal electric field may create improvements intransducer transmit and receive sensitivities and also create additionalresonances to enable wider bandwidth.

In FIGS. 20-30 , each array may have one or more membranes disposedunder the piezoelectric elements. In embodiments, the membranes may havemultiple modes of vibration. In embodiments, one membrane may vibrate inthe fundamental mode at a certain frequency while another membrane mayvibrate at a different frequency determined by membrane design andrelative arrangements of electrodes with different poling directions. Inembodiments, multiple membranes may be driven by same electrode set andeach membrane may have different fundamental frequencies. Inembodiments, each membrane may be responsive to a wide range offrequencies, increasing its bandwidth. Also, such a transducer withdifferent poling directions may help increase transmit and receivesensitivities while also enabling a high bandwidth transducer.

In FIGS. 22, 24, 25 , the X (or T) electrodes in a column may beelectrically coupled to a conductor. In embodiments, these conductorsmay be electrically coupled to one common conductor. For instance, inFIG. 22 , the conductors 2008-1-2208-n may be electrically coupled toone common conductor line so that all of the T electrodes in the array2200 may be connected to the ground or a common DC bias voltage.

In FIGS. 20-29 , each array may include piezoelectric elements that arearranged in a two dimensional array, where the number of elements in thex-direction may be the same as the number of elements in they-direction. However, it should be apparent to those of ordinary skillin the art that the number of elements in the x-direction may bedifferent from the number of elements in the y-direction.

In embodiments, the ASIC chip (such as 1804) coupled to the transducersubstrate (such as 1802) may contain temperature sensors that measurethe surface temperatures of the imaging device 120 facing the human bodyduring operation. In embodiments, the maximum allowable temperature maybe regulated, and this regulation may limit the functionality of theimaging device since the temperatures should not rise beyond theallowable upper limit. In embodiments, this temperature information maybe used to improve image quality. For example, if temperature is belowthe maximum allowed limit, additional power may be consumed in theamplifiers to lower its noise and improve system signal-to-noise ratio(SNR) for improved quality images.

In embodiments, the power consumed by the imaging device 120 increasesas the number of line units that are driven simultaneously increases.All line units in the imaging device 120 may need to be driven tocomplete transmitting pressure waves from the whole aperture. If only afew line units are driven to transmit pressure waves, wait and receivethe reflected echo at a time, it will take more time to complete onecycle of driving the entire line units for the whole aperture, reducingthe rate at which images can be taken per second (frame rate). In orderto improve this rate, more line units need to be driven at a time. Inembodiments, the information of the temperature may allow the imagingdevice 120 to drive more lines to improve the frame rate.

In FIGS. 20-30 , each piezoelectric element may have one bottomelectrode (O) and one or more top electrodes (X and T) and have morethan one resonance frequency. For instance, each piezoelectric element2502 in FIG. 25 may have one bottom electrode (O) and two topelectrodes, where the first top electrode and the bottom electrode (O)may be responsive to a first frequency f1, while the second topelectrode and the bottom electrode (O) may be responsive to a secondfrequency f2 that may be different from f1.

In embodiments, the electrical charge developed during the receive modeis transferred to an amplifier, such as 1811, 2810, 2814, 2910, 2914,3010, 3016, 3128, and 3228. Then, the amplified signal may be furtherprocessed by various electrical components. As such, it should beapparent to those of ordinary skill in the art that the each of theamplifiers 1811, 2810, 2814, 2910, 2914, 3010, 3016, 3128, and 3228collectively refers to one or more electrical components/circuits thatprocess the electrical charge signal, i.e., each amplifier symbolicallyrepresents one or more electrical components/circuits for processing theelectrical charge signal.

FIG. 38 shows a schematic diagram of an imaging assembly 3800 accordingto embodiments of the present disclosure. As depicted, the imagingassembly 3800 may include: a transceiver substrate 3801 havingpiezoelectric elements (not shown in FIG. 38 ); an ASIC chip 3802electrically coupled to the transceiver substrate 3801; a receivermultiplexer 3820 electrically coupled to the ASIC chip 3802; a receiveranalogue-front-end (AFE) 3830; a transmitter multiplexer 3824electrically coupled to the ASIC chip 3802; and a transmit beamformer3834 electrically coupled to the second multiplexer 3824. Inembodiments, the ASIC chip 3802 may include multiple circuits 3804 thatare connected to and configured to drive multiple piezoelectric elementsin the transceiver substrate 3801. In embodiments, each circuit 3804 mayinclude a receiver amplifier (or shortly amplifier) 3806, such as LNA,and a transmit driver 3808 for transmitting a signal to a piezoelectricelement, and a switch 3810 that toggles between the amplifier 3806 andthe transmit driver 3808. The amplifiers may have programmable gain andmeans to connect them to piezo elements that need to be sensed. Thetransmit drivers have means to optimize their impedance and means to beconnected to piezoelectric elements that are to be driven.

In embodiments, the receiver multiplexer 3820 may include multipleswitches 3822 and the receiver AFE 3830 may include multiple amplifiers3832. In embodiments, each of the switches 3822 may electricallyconnect/disconnect a circuit 3804 to/from an amplifier 3832. Inembodiments, the transmitter multiplexer 3824 may include multipleswitches 3826 and the transmit beamformer 3834 may include multipletransmit driver 3836 and other circuitry not shown to control therelative delay between transmit driver waveform of the various drivers,and other circuitry not shown to control the frequency and the number ofpulses for each of the transmit drivers. In embodiments, each of theswitches 3826 turn on during a transmit operation and connect to circuit3804, while switches 3822 turn off, while switch 3810 connects totransmit driver 3808. Similarly, during a receive operation, switches3826 turn off while switches 3822 turn on, while switch 3810 isconnected to amplifier 3806.

In embodiments, the switches 3810 may be toggled to the transmit drivers3808 during the transmit mode and toggle to the amplifiers 3806 duringthe receive mode. In embodiments, a portion of the switches 3822 may beclosed so that the corresponding circuits 3804 may be set to the receivemode. Similarly, a portion of the switches 3826 may be closed so thatthe corresponding circuits 3804 may be set to the transmit mode. Since aportion of the switches 3822 and a portion of the switches 3826 may beclosed simultaneously, the imager assembly may be operated in bothtransmit and receive modes simultaneously. Also, the receivermultiplexer 3820 and the transmitter multiplexer 3824 reduce the numberof ASIC pins. In embodiments, the receiver multiplexer 3820, receiverAFE 3830, transmitter multiplexer 3824, and transmitter beamformer 3834may be included in the circuits 215 in FIG. 2 .

In embodiments, each piezoelectric may have more than two electrodes,where one electrode may be in the transmit mode to generate pressurewaves while the other electrode may be simultaneously in the receivemode to develop electrical charge. This simultaneous operation oftransmit and receive modes may allow three dimensional imaging.

While the invention is susceptible to various modifications andalternative forms, specific examples thereof have been shown in thedrawings and are herein described in detail. It should be understood,however, that the invention is not to be limited to the particular formsdisclosed, but to the contrary, the invention is to cover allmodifications, equivalents, and alternatives falling within the scope ofthe appended claims.

What is claimed is:
 1. A circuit for controlling a plurality ofpiezoelectric elements, comprising: a first conductor for transmitting adriving signal to one or more of the plurality of piezoelectric elementstherethrough; and a second conductor for transmitting a sensor signalfrom one or more of the plurality of piezoelectric elementstherethrough; and a plurality of circuit elements that each comprise: afirst switch having a first end electrically coupled to the secondconductor and a first electrode of a piezoelectric element; a secondswitch having first and second ends, the first end of the second switchbeing electrically coupled to the first conductor; a transmit driverelectrically coupled to the second end of the second switch andconfigured to transmit a signal to a first electrode of a piezoelectricelement upon receiving the driving signal through the second end of thesecond switch; and a third switch having first and second ends, thefirst end of the third switch being electrically coupled to the secondend of the second switch, the second end of the third switch beingelectrically coupled to an electrode of a piezoelectric element.
 2. Thecircuit of claim 1, wherein the second conductor is electrically coupledto a DC bias voltage during operation of the plurality of piezoelectricelements.
 3. The circuit of claim 1, further comprising a thirdconductor, wherein each circuit element of the plurality of circuitelements further comprises a fourth switch having first and second ends,the first end of the fourth switch being electrically coupled to thethird conductor, the second end of the fourth switch being electricallycoupled to a third electrode of a piezoelectric element.
 4. The circuitof claim 3, wherein the third conductor is electrically coupled to a DCbias voltage during operation of the plurality of piezoelectricelements.
 5. The circuit of claim 1, further comprising an electricalcircuit electrically coupled to the second conductor and configured toprocess a signal received through the second conductor.
 6. An electricalsystem for controlling piezoelectric elements, comprising: a firstelectrical circuit electrically coupled to a first conductor andconfigured to process a signal received through the first conductor; anarray of piezoelectric elements that each have a piezoelectric layer, abottom electrode disposed on a bottom side of the piezoelectric layer,and first and second top electrodes disposed on a top side of thepiezoelectric layer, the first top electrodes of a portion ofpiezoelectric elements in a first column of the array being electricallycoupled to the first conductor; a second conductor being electricallycoupled to the second top electrodes of a portion of piezoelectricelements in a second column of the array; a second electrical circuitfor processing a signal; a transmit driver for sending a signal to thesecond conductor; and a switch having first and second ends, the firstend being electrically coupled to the second conductor, and the secondend being selectively coupled to one of the second electrical circuitand the transmit driver.
 7. The electrical system of claim 6, whereinthe first and second electrical circuits may be formed in an ASIC chip.8. The electrical system of claim 6, wherein n electrical circuits maybe formed in an ASIC chip.
 9. The electrical system of claim 7, whereinthe array of piezoelectric elements may be connected to the first andsecond electrical circuits within 25 μm-100 μm.
 10. The electricalsystem of claim 8, wherein the array of piezoelectric elements may beconnected to the n electrical circuits within 25 μm-100 μm.
 11. Theelectrical system of claim 10, further comprising one control unit forcontrolling the n circuits.
 12. The electrical system of claim 6,wherein the array is a two-dimensional array.
 13. The electrical systemof claim 6, wherein the first electrode may be connected to a ground ora DC bias via the first conductor.
 14. The electrical system of claim 6,wherein the second electrode may be connected to an electrical circuitthrough a signal conductor.
 15. The electrical system of claim 6,wherein each electrical circuit comprises a transmit driver, a receiveramplifier, a switch having one terminal electrically coupled to theconductor and another terminal that toggles between the first and secondconductors coupled to the transmit driver and amplifier.
 16. Theelectrical system of claim 15, wherein during a transmit mode, theswitch may connect the transmit driver to the piezoelectric element sothat a signal is transmitted to the top electrode of the piezoelectricelement.
 17. The electrical system of claim 15, wherein during a receivemode, the switch may connect the amplifier to the piezoelectric elementso that a signal is transmitted from the top electrode of thepiezoelectric element to the amplifier.